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Satoshi Goto: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Tatsuyuki Ishikawa, Kazunori Shimizu, Takeshi Ikenaga, Satoshi Goto
    High-throughput decoder for low-density parity-check code. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2006, pp:112-113 [Conf]
  2. Lingfeng Li, Satoshi Goto, Takeshi Ikenaga
    An efficient deblocking filter architecture with 2-dimensional parallel memory for H.264/AVC. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:623-626 [Conf]
  3. Kazunori Shimizu, Nozomu Togawa, Takeshi Ikenaga, Satoshi Goto
    Reconfigurable adaptive FEC system with interleaving. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:1252-1255 [Conf]
  4. Hajimu Mori, Keiko Mitsumoto, Tomyyuki Fujita, Satoshi Goto
    Knowledge-Based VLSI Routing System - WIREX. [Citation Graph (0, 0)][DBLP]
    FGCS, 1984, pp:383-388 [Conf]
  5. Zhenyu Liu, Yang Song, Takeshi Ikenaga, Satoshi Goto
    A VLSI array processing oriented fast fourier transform algorithm and hardware implementation. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2005, pp:291-295 [Conf]
  6. Shen Li, Xianghui Wei, Takeshi Ikenaga, Satoshi Goto
    A VLSI architecture design of an edge based fast intra prediction mode decision algorithm for H.264/avc. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2007, pp:20-24 [Conf]
  7. Zhenyu Liu, Yiqing Huang, Yang Song, Satoshi Goto, Takeshi Ikenaga
    Hardware-efficient propagate partial sad architecture for variable block size motion estimation in H.264/AVC. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2007, pp:160-163 [Conf]
  8. Kazunori Shimizu, Tatsuyuki Ishikawa, Takeshi Ikenaga, Satoshi Goto, Nozomu Togawa
    Partially-Parallel LDPC Decoder Based on High-Efficiency Message-Passing Algorithm. [Citation Graph (0, 0)][DBLP]
    ICCD, 2005, pp:503-510 [Conf]
  9. Yangxing Liu, Satoshi Goto, Takeshi Ikenaga
    A Robust Algorithm for Text Detection in Color Images. [Citation Graph (0, 0)][DBLP]
    ICDAR, 2005, pp:399-405 [Conf]
  10. Yangxing Liu, Satoshi Goto, Takeshi Ikenaga
    An accurate and low complexity approach of detecting circular shape objects in still color images. [Citation Graph (0, 0)][DBLP]
    ICIP (1), 2005, pp:333-336 [Conf]
  11. Seiichiro Hiratsuka, Satoshi Goto, Takaaki Baba, Takeshi Ikenaga
    A locally adaptive subsampling algorithm for software based motion estimation. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2005, pp:2891-2894 [Conf]
  12. Seung-Man Pyen, Kyeong-Yuk Min, Jong-Wha Chong, Satoshi Goto
    An Efficient Hardware Architecture for Full-Search Variable Block Size Motion Estimation in H.264/AVC. [Citation Graph (0, 0)][DBLP]
    ISVC (2), 2006, pp:554-563 [Conf]
  13. Masaki Ishikawa, T. Matsuda, T. Yoshimura, Satoshi Goto
    Compaction-Based Custom LSI Layout Design Method. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1987, v:6, n:3, pp:374-382 [Journal]
  14. Xianghui Wei, Shen Li, Yang Song, Satoshi Goto
    An Irregular Search Window Reuse Scheme for Motion Estimation in MPEG-2 to H.264 Transcoding. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:1987-1990 [Conf]
  15. Yang Song, Zhenyu Liu, Takeshi Ikenaga, Satoshi Goto
    Enhanced Strict Multilevel Successive Elimination Algorithm for Fast Motion Estimation. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:3659-3662 [Conf]
  16. Changqi Yang, S. Goto, T. Ikenaga
    High performance VLSI architecture of fractional motion estimation in H.264 for HDTV. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  17. Kazunori Shimizu, Tatsuyuki Ishikawa, Nozomu Togawa, Takeshi Ikenaga, Satoshi Goto
    A parallel LSI architecture for LDPC decoder improving message-passing schedule. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  18. Seiichiro Hiratsuka, Satoshi Goto, Takeshi Ikenaga
    An ultra-low complexity motion estimation algorithm and its implementation of specific processor. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  19. Yangxing Liu, Takeshi Ikenaga, Satoshi Goto
    An MRF model-based approach to the detection of rectangular shape objects in color images. [Citation Graph (0, 0)][DBLP]
    Signal Processing, 2007, v:87, n:11, pp:2649-2658 [Journal]

  20. A Novel Approach of Rectangular Shape Object Detection in Color Images Based on An MRF Model. [Citation Graph (, )][DBLP]

  21. Geometric Primitives Detection in Aerial Image. [Citation Graph (, )][DBLP]

  22. A high performance LDPC decoder for IEEE802.11n standard. [Citation Graph (, )][DBLP]

  23. Symmetry constraint based on mismatch analysis for analog layout in SOI technology. [Citation Graph (, )][DBLP]

  24. Cache miss reduction through hardware-assisted loop optimization. [Citation Graph (, )][DBLP]

  25. A cost-efficient partially-parallel irregular LDPC decoder based on sum-delta message passing algorithm. [Citation Graph (, )][DBLP]

  26. HyMacs: hybrid memory access optimization based on custom-instruction scheduling. [Citation Graph (, )][DBLP]

  27. Voltage-island driven floorplanning considering level-shifter positions. [Citation Graph (, )][DBLP]

  28. Reconfigurable SAD tree architecture based on adaptive sub-sampling in HDTV application. [Citation Graph (, )][DBLP]

  29. Bus via reduction based on floorplan revising. [Citation Graph (, )][DBLP]

  30. A revisit to voltage partitioning problem. [Citation Graph (, )][DBLP]

  31. A novel fixed-outline floorplanner with zero deadspace for hierarchical design. [Citation Graph (, )][DBLP]

  32. Optimization of Propagate Partial SAD and SAD tree motion estimation hardwired engine for H.264. [Citation Graph (, )][DBLP]

  33. A motion vector difference based self-incremental adaptive search range algorithm for variable block size motion estimation. [Citation Graph (, )][DBLP]

  34. A Motion Vector Prediction Scheme for MPEG-2 to H.264 Transcoding Based on Smoothness of Motion Vector Field. [Citation Graph (, )][DBLP]

  35. Ultra Low-Complexity Fast Variable Block Size Motion Estimation Algorithm in H.264/AVC. [Citation Graph (, )][DBLP]

  36. VLSI Oriented Fast Multiple Reference Frame Motion Estimation Algorithm for H.264/AVC. [Citation Graph (, )][DBLP]

  37. Fast motion estimation for H.264/AVC using image edge features. [Citation Graph (, )][DBLP]

  38. Hardware-oriented direction-based fast fractional motion estimation algorithm in H.264/AVC. [Citation Graph (, )][DBLP]

  39. A 136 cycles/MB, luma-chroma parallelized H.264/AVC deblocking filter for QFHD applications. [Citation Graph (, )][DBLP]

  40. Composite modeling of optical flow for artifacts reduction. [Citation Graph (, )][DBLP]

  41. An advanced hierarchical motion estimation scheme with lossless frame recompression for ultra high definition video coding. [Citation Graph (, )][DBLP]

  42. Low power surveillance video coding system. [Citation Graph (, )][DBLP]

  43. VLSI friendly computation reduction scheme in H.264/AVC motion estimation. [Citation Graph (, )][DBLP]

  44. Power-efficient LDPC code decoder architecture. [Citation Graph (, )][DBLP]

  45. Automated Specific Instruction Customization Methodology for Multimedia Processor Acceleration. [Citation Graph (, )][DBLP]

  46. Fixed outline multi-bend bus driven floorplanning. [Citation Graph (, )][DBLP]

  47. A Fast Hybrid Decision Algorithm for H.264/AVC Intra Prediction Based on Entropy Theory. [Citation Graph (, )][DBLP]

  48. Enhanced Temporal Error Concealment for 1Seg Video Broadcasting. [Citation Graph (, )][DBLP]

  49. A New Video Encryption Scheme for H.264/AVC. [Citation Graph (, )][DBLP]

  50. Temporal Scalable Decoding Process with Frame Rate Conversion Method for Surveillance Video. [Citation Graph (, )][DBLP]

  51. A Bandwidth Reduction Scheme and Its VLSI Implementation for H.264/AVC Motion Vector Decoding. [Citation Graph (, )][DBLP]

  52. Encoder Adaptable Difference Detection for Low Power Video Compression in Surveillance System. [Citation Graph (, )][DBLP]

  53. An Efficient Frame Loss Error Concealment Scheme Based on Tentative Projection for H.264/AVC. [Citation Graph (, )][DBLP]

  54. Integrated interlayer via planning and pin assignment for 3D ICs. [Citation Graph (, )][DBLP]

  55. Inter-symbol Interference Suppression Scheme using Periodic Signal Waveform for Fixed-rate COFDM Systems. [Citation Graph (, )][DBLP]

  56. Enhanced Partial Distortion Sorting Fast Motion Estimation Algorithm for Low-Power Applications. [Citation Graph (, )][DBLP]

  57. Complexity Based Fast Coding Mode Decision for MPEG-2 / H.264 Video Transcoding. [Citation Graph (, )][DBLP]

  58. A New Multiscale Line Detection Approach for Aerial Image with Complex Scene. [Citation Graph (, )][DBLP]

  59. A Novel Hybrid Approach of Color Image Segmentation. [Citation Graph (, )][DBLP]

  60. A CABAC Encoding Core with Dynamic Pipeline for H.264/AVC Main Profile. [Citation Graph (, )][DBLP]

  61. Robust Scalable Video Transmission using Object-Oriented Unequal Loss Protection over Internet. [Citation Graph (, )][DBLP]

  62. Memory-Efficient Accelerating Schedule for LDPC Decoder. [Citation Graph (, )][DBLP]

  63. H.264/AVC Fractional Motion Estimation Engine with Computation Reusing in HDTV1080P Real-Time Encoding Applications. [Citation Graph (, )][DBLP]

  64. 32-Parallel SAD Tree Hardwired Engine for Variable Block Size Motion Estimation in HDTV1080P Real-Time Encoding Application. [Citation Graph (, )][DBLP]

  65. An Adaptive Spatial Error Concealment for H.264/AVC Video Stream. [Citation Graph (, )][DBLP]

  66. A New DCT-Domain Distortion Model for MB-Level Quality Control. [Citation Graph (, )][DBLP]

  67. Motion Detection Based on Background Modeling and Performance Analysis for Outdoor Surveillance. [Citation Graph (, )][DBLP]

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