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Yen-Tai Lai :
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Chi-Chou Kao , Yen-Tai Lai Area-minimal algorithm for LUT-based FPGA technology mapping with duplication-free restriction. [Citation Graph (0, 0)][DBLP ] ASP-DAC, 2004, pp:719-724 [Conf ] Lih-Yang Wang , Yen-Tai Lai , Bin-Da Liu , Ting-Chung Chang A graph-based simplex algorithm for minimizing the layout size and the delay on timing critical paths. [Citation Graph (0, 0)][DBLP ] ICCAD, 1993, pp:703-708 [Conf ] Yen-Tai Lai , Yung-Chuan Jiang , Hong-Ming Chu BDD decomposition for mixed CMOS/PTL logic circuit synthesis. [Citation Graph (0, 0)][DBLP ] ISCAS (6), 2005, pp:5649-5652 [Conf ] Yen-Tai Lai , Hsin-Ya Lai , Chia-Nan Yeh Placement for the reconfigurable datapath architecture. [Citation Graph (0, 0)][DBLP ] ISCAS (2), 2005, pp:1875-1878 [Conf ] Ping-Tsung Wang , Kun-Nen Chen , Yen-Tai Lai A High Performance FPGA with Hierarchical Interconnection Structure. [Citation Graph (0, 0)][DBLP ] ISCAS, 1994, pp:239-242 [Conf ] Lih-Yang Wang , Yen-Tai Lai , Bin-Da Liu , Tin-Chung Chang Layout Compaction with Minimzed Delay Bound on Timing Critical Paths. [Citation Graph (0, 0)][DBLP ] ISCAS, 1993, pp:1849-1852 [Conf ] Chi-Chou Kao , Yen-Tai Lai A routability and performance driven technology mapping algorithm for LUT based FPGA designs. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 1999, pp:474-477 [Conf ] Yen-Tai Lai , Chi-Chou Kao , Wu-Chien Shieh A quadratic programming method for interconnection crosstalk minimization. [Citation Graph (0, 0)][DBLP ] ISCAS (6), 1999, pp:270-273 [Conf ] Yen-Tai Lai , Sany M. Leinwand A Theory of Rectangular Dual Graphs. [Citation Graph (0, 0)][DBLP ] Algorithmica, 1990, v:5, n:4, pp:467-483 [Journal ] Lih-Yang Wang , Yen-Tai Lai , Bin-Da Liu , Tin-Chung Chang Performance-directed compaction for VLSI symbolic layouts. [Citation Graph (0, 0)][DBLP ] Computer-Aided Design, 1995, v:27, n:1, pp:65-74 [Journal ] Yen-Tai Lai , Sany M. Leinwand Algorithms for floorplan design via rectangular dualization. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:12, pp:1278-1289 [Journal ] Lih-Yang Wang , Yen-Tai Lai Graph-theory-based simplex algorithm for VLSI layout spacingproblems with multiple variable constraints. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 2001, v:20, n:8, pp:967-979 [Journal ] Chi-Chou Kao , Yen-Tai Lai An efficient algorithm for finding the minimal-area FPGA technology mapping. [Citation Graph (0, 0)][DBLP ] ACM Trans. Design Autom. Electr. Syst., 2005, v:10, n:1, pp:168-186 [Journal ] Chia-Nan Yeh , Yen-Tai Lai Low power readout control circuit for high resolution CMOS image sensor. [Citation Graph (0, 0)][DBLP ] ISCAS, 2006, pp:- [Conf ] Yen-Tai Lai , Ping-Tsung Wang Hierarchical interconnection structures for field programmable gate arrays. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 1997, v:5, n:2, pp:186-196 [Journal ] A novel flash analog-to-digital converter. [Citation Graph (, )][DBLP ] Search in 0.002secs, Finished in 0.002secs