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## Search the dblp DataBase
Takao Waho:
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## Publications of Author- Ryozo Katoh, Shin-ya Kobayashi, Takao Waho
**A dynamic element matching circuit for multi-bit delta-sigma modulators.**[Citation Graph (0, 0)][DBLP] ASP-DAC, 2004, pp:569-570 [Conf] - Masafumi Yamamoto, Hideaki Matsuzaki, Toshihiro Itoh, Takao Waho, T. Akeyoshi, J. Osaka
**Ultrahigh-Speed Circuits Using Resonant Tunneling Devices.**[Citation Graph (0, 0)][DBLP] Great Lakes Symposium on VLSI, 1999, pp:150-153 [Conf] - Masaru Chibashi, Keisuke Eguchi, Takao Waho
**A novel delta-sigma modulator using resonant-tunneling quantizers.**[Citation Graph (0, 0)][DBLP] ISCAS (1), 2004, pp:533-536 [Conf] - Naokazu Muramatsu, Hiroshi Okazaki, Takao Waho
**A novel oscillation circuit using a resonant-tunneling diode.**[Citation Graph (0, 0)][DBLP] ISCAS (3), 2005, pp:2341-2344 [Conf] - Keisuke Eguchi, Masaru Chibashi, Takao Waho
**A Design of 10-GHz Delta-Sigma Modulator using a 4-Level Differential Resonant-Tunneling Quantizer.**[Citation Graph (0, 0)][DBLP] ISMVL, 2005, pp:43-47 [Conf] - Toshihiro Itoh, Takao Waho, K. Maezawa, Masafumi Yamamoto
**Ultrafast Ternary Quantizer using Resonant Tunneling Devices.**[Citation Graph (0, 0)][DBLP] ISMVL, 1998, pp:13-18 [Conf] - Mitsuhiro Tanihata, Takao Waho
**A Feedback-Signal Shaping Technique for Multi-Level Continuous-Time Delta-Sigma Modulators with Clock-Jitter.**[Citation Graph (0, 0)][DBLP] ISMVL, 2006, pp:20- [Conf] - Takao Waho, Kazufumi Hattori, Kouji Honda
**Novel Resonant-Tunneling Multiple-Threshold Logic Circuit Based on Switching Sequence Detection.**[Citation Graph (0, 0)][DBLP] ISMVL, 2000, pp:317-322 [Conf] - Takao Waho, Kazufumi Hattori, Y. Takamatsu
**Flash Analog-to-Digital Converter Using Resonant-Tunneling Multiple-Valued Circuits.**[Citation Graph (0, 0)][DBLP] ISMVL, 2001, pp:94-99 [Conf] - Yuki Tsuji, Takao Waho
**Multiple-Input Resonant-Tunneling Logic Gates for Flash A/D Converter Applications.**[Citation Graph (0, 0)][DBLP] ISMVL, 2004, pp:8-13 [Conf] - Takao Waho
**Resonant Tunneling Transistor and Its Application to Multiple-Valued Logic Circuits.**[Citation Graph (0, 0)][DBLP] ISMVL, 1995, pp:130-0 [Conf] - Takao Waho, Kevin J. Chen, Masafumi Yamamoto
**A Literal Gate Using Resonant-Tunneling Devices.**[Citation Graph (0, 0)][DBLP] ISMVL, 1996, pp:68-73 [Conf] - Takao Waho, Shin-ya Kobayashi, Koji Matsuura
**An Impact of Introducing Multi-Level Signals to a Bandpass Cascaded Delta-Sigma Modulator.**[Citation Graph (0, 0)][DBLP] ISMVL, 2002, pp:61-66 [Conf] - Takao Waho, Masafumi Yamamoto
**Application of Resonant-Tunneling Quaternary Quantizer to Ultrahigh-Speed A/D Converter.**[Citation Graph (0, 0)][DBLP] ISMVL, 1997, pp:35-40 [Conf] - Masaru Chibashi, Keisuke Eguchi, Shinpei Nakagawa, Takao Waho
**A fully-differential resonant-tunneling circuit.**[Citation Graph (0, 0)][DBLP] IEICE Electronic Express, 2005, v:2, n:7, pp:221-225 [Journal] - Takao Waho, Akinori Yamada, Hiroki Okuyama, Victor Khorenko, Thai Do, Werner Prost
**A Four-Resonant-Tunneling-Diode (4RTD) NAND/NOR Logic Gate.**[Citation Graph (0, 0)][DBLP] ISCAS, 2007, pp:129-132 [Conf] - Shunsuke Akiyama, Takao Waho
**A 6-bit low-power compact flash ADC using current-mode threshold logic gates.**[Citation Graph (0, 0)][DBLP] ISCAS, 2006, pp:- [Conf] **A 3/7-Level Mixed-Mode Algorithmic Analog-to-Digital Converter.**[Citation Graph (, )][DBLP]**A Ternary Analog-to-Digital Converter System.**[Citation Graph (, )][DBLP]**Time-Interleaved Polyphase Decimation Filter Using Signed-Digit Adders.**[Citation Graph (, )][DBLP]**A Low-Power Successive Approximation Analog-to-Digital Converter Based on 2-Bit/Step Comparison.**[Citation Graph (, )][DBLP]
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