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Shoji Kawahito: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Shoji Kawahito, Yoshiaki Tadokoro, Akira Matsuzawa
    CMOS Image Sensors with Video Compression. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 1998, pp:595-600 [Conf]
  2. Shoji Kawahito, Makoto Yoshida, Masaaki Sasaki, Daisuke Miyazaki, Yoshiaki Tadokoro, Kenji Murata, Shiro Doushou, Akira Matsuzawa
    A CMOS Smart Image Sensor LSI for Focal-Plane Compression. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 1998, pp:339-340 [Conf]
  3. Atsushi Suzuki, Shoji Kawahito, Daisuke Miyazaki, Masanori Furuta
    A digitally skew correctable multi-phase clock generator using a master-slave DLL. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2003, pp:105-108 [Conf]
  4. Shoji Kawahito, Y. Mitsui, Makoto Ishida, Tetsuro Nakamura
    Parallel Hardware Algorithms with Redundant Number Representations for Multiple-Valued Arithmetic VLSI. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1992, pp:337-345 [Conf]
  5. Shoji Kawahito, K. Mizuno, Tasuro Nakamura
    Multiple-Valued Current-Mode Arithmetic Circuits Based on Redundant Positive-Digit Number Representations. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1991, pp:330-339 [Conf]
  6. Michitaka Kameyama, Shoji Kawahito, Tatsuo Higuchi
    A Multiplier Chip with Multiple-Valued Bidirectional Current-Mode Logic Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1988, v:21, n:4, pp:43-56 [Journal]
  7. Shoji Kawahito, Makoto Ishida, Tetsuro Nakamura, Michitaka Kameyama, Tatsuo Higuchi
    High-Speed Area-Efficient Multiplier Design Using Multiple-Valued Current-Mode Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1994, v:43, n:1, pp:34-42 [Journal]
  8. Shoji Kawahito, Makoto Ishida, Tasuro Nakamura, Michitaka Kameyama, Tatsuo Higuchi
    Author's Reply. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:5, pp:639- [Journal]
  9. Dwi Handoko, Shoji Kawahito, Yoshiaki Tadokoro, Akira Matsuzawa
    Low-power motion vector estimation using iterative search block-matching methods and a high-speed non-destructive CMOS image sensor. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Circuits Syst. Video Techn., 2002, v:12, n:12, pp:1084-0 [Journal]
  10. K. Honda, Masanori Furuta, Shoji Kawahito
    A 1V 10b 125MSample/s A/D Converter Using Cascade Amp-Sharing and Capacitance Coupling Techniues. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:1031-1034 [Conf]
  11. Shoji Kawahito
    Circuit and Device Technologies for CMOS functional Image Sensors. [Citation Graph (0, 0)][DBLP]
    VLSI-SoC, 2006, pp:42-47 [Conf]

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