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Publications of Author

1. Shunitsu Kohara, Naoki Tomono, Jumpei Uchida, Yuichiro Miyaoka, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki
   An interface-circuit synthesis method with configurable processor core in IP-based SoC designs. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2006, pp:594-599 [Conf]
   
2. Yuichiro Miyaoka, Yoshiharu Kataoka, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki
   Area/delay estimation for digital signal processor cores. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2001, pp:156-161 [Conf]
   
3. Yuichiro Miyaoka, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki
   A cosynthesis algorithm for application specific processors with heterogeneous datapaths. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2004, pp:250-255 [Conf]
   
4. Nozomu Togawa, Koichi Tachikake, Yuichiro Miyaoka, Masao Yanagisawa, Tatsuo Ohtsuki
   Instruction set and functional unit synthesis for SIMD processor cores. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2004, pp:743-750 [Conf]
   
5. Naoki Tomono, Shunitsu Kohara, Jumpei Uchida, Yuichiro Miyaoka, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki
   A processor core synthesis system in IP-based SoC design. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2005, pp:286-291 [Conf]
   
6. 
   Sub-operation parallelism optimization in SIMD processor synthesis and its experimental evaluations. [Citation Graph (, )][DBLP]
   
   
7. 
   An algorithm of hardware unit generation for processor core synthesis with packed SIMD type instructions. [Citation Graph (, )][DBLP]