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Satoshi Komatsu: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Satoshi Komatsu, Makoto Ikeda, Kunihiro Asada
    Low Power Micoprocessors for Comparative Study on Bus Architecture and Multiplexer Architecture. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 1998, pp:323-324 [Conf]
  2. Shanghua Gao, Kenshu Seto, Satoshi Komatsu, Masahiro Fujita
    Pipeline Scheduling for Array Based Reconfigurable Architectures Considering Interconnect Delays. [Citation Graph (0, 0)][DBLP]
    FPT, 2005, pp:137-144 [Conf]
  3. Yu Liu, Thanyapat Sakunkonchak, Satoshi Komatsu, Masahiro Fujita
    System level design language extensions for timed/untimed digital-analog combined system design. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2005, pp:130-133 [Conf]
  4. Satoshi Komatsu, Makoto Ikeda, Kunihiro Asada
    Low Power Chip Interface Based on Bus Data Encoding with Adaptive Code-Book Method. [Citation Graph (0, 0)][DBLP]
    Great Lakes Symposium on VLSI, 1999, pp:368-371 [Conf]
  5. Masahiro Fujita, Satoshi Komatsu, Hiroshi Saito, Kenshu Seto, Thanyapat Sakunkonchak, Yoshihisa Kojima
    Field Modifiable Architecture with FPGAs and its Design/Verification/Debugging Methodologies. [Citation Graph (0, 0)][DBLP]
    HICSS, 2003, pp:279- [Conf]
  6. Yoshihisa Kojima, Hiroshi Saito, Kenshu Seto, Satoshi Komatsu, Masahiro Fujita
    Field Modifiable Architecture and its Design Methodology: System Design Without Logic Synthesis. [Citation Graph (0, 0)][DBLP]
    IWLS, 2002, pp:103-108 [Conf]
  7. Hiroshi Saito, Kenshu Seto, Yoshihisa Kojima, Satoshi Komatsu, Masahiro Fujita
    Engineering Changes in Field Modifiable Architectures. [Citation Graph (0, 0)][DBLP]
    MEMOCODE, 2003, pp:87-94 [Conf]
  8. Thanyapat Sakunkonchak, Satoshi Komatsu, Masahiro Fujita
    Synchronization verification in system-level design with ILP solvers. [Citation Graph (0, 0)][DBLP]
    MEMOCODE, 2005, pp:121-130 [Conf]
  9. Tohru Ishihara, Satoshi Komatsu, Makoto Ikeda, Masahiro Fujita, Kunihiro Asada
    Comparative Study On Verilog-Based And C-Based Hardware Design Education. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:41-42 [Conf]
  10. Thanyapat Sakunkonchak, Satoshi Komatsu, Masahiro Fujita
    Using Counterexample Analysis to Minimize the Number of Predicates for Predicate Abstraction. [Citation Graph (0, 0)][DBLP]
    ATVA, 2007, pp:553-563 [Conf]
  11. Satoshi Komatsu, Masahiro Fujita
    An optimization of bus interconnects pitch for low-power and reliable bus encoding scheme. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  12. Shanghua Gao, Kenshu Seto, Satoshi Komatsu, Masahiro Fujita
    Interconnect-aware Pipeline Synthesis for Array based Reconfigurable Architectures. [Citation Graph (0, 0)][DBLP]
    IESS, 2007, pp:121-134 [Conf]

  13. Protocol Transducer Synthesis using Divide and Conquer approach. [Citation Graph (, )][DBLP]


  14. An automatic test generation framework for digitally-assisted adaptive equalizers in high-speed serial links. [Citation Graph (, )][DBLP]


  15. Signature-Based Testing for Digitally-Assisted Adaptive Equalizers in High-Speed Serial Links. [Citation Graph (, )][DBLP]


  16. AMS Extensions for Timed/Untimed System-Level Design Language. [Citation Graph (, )][DBLP]


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