The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Christophe Wolinski: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Apostolos A. Kountouris, Christophe Wolinski
    Combining Speculative Execution and Conditional Resource Sharing to Efficiently Schedule Conditional Behaviors. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 1999, pp:343-346 [Conf]
  2. Krzysztof Kuchcinski, Christophe Wolinski
    Synthesis of Conditional Behaviors Using Hierarchical Conditional Dependency Graphs and Constraint Logic Programming. [Citation Graph (0, 0)][DBLP]
    DSD, 2001, pp:220-227 [Conf]
  3. Christophe Wolinski, Krzysztof Kuchcinski
    A Constraints Programming Approach for Fabric Cell Synthesis. [Citation Graph (0, 0)][DBLP]
    DSD, 2005, pp:356-363 [Conf]
  4. Christophe Wolinski, Krzysztof Kuchcinski, Maya Gokhale
    A Constraints Programming Approach to Communication Scheduling on SoPC Architectures. [Citation Graph (0, 0)][DBLP]
    DSD, 2004, pp:308-315 [Conf]
  5. Reid B. Porter, Jan R. Frigo, Maya Gokhale, Christophe Wolinski, François Charot, Charles Wagner
    A Run-Time Re-configurable Parametric Architecture for Local Neighborhood Image Processing. [Citation Graph (0, 0)][DBLP]
    DSD, 2006, pp:107-115 [Conf]
  6. Christophe Wolinski, Frans Trouw, Maya Gokhale
    A Preliminary Study of Molecular Dynamics on Reconfigurable Computers. [Citation Graph (0, 0)][DBLP]
    Engineering of Reconfigurable Systems and Algorithms, 2003, pp:304-307 [Conf]
  7. Apostolos A. Kountouris, Christophe Wolinski
    Efficient Scheduling of Conditional Behaviors Using Hierarchical Conditional Dependency Graphs in the CODESIS System. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 2000, pp:1222-1229 [Conf]
  8. Apostolos A. Kountouris, Christophe Wolinski
    Hierarchical Conditional Dependency Graphs for Conditional Resource Sharing. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 1998, pp:10313-10316 [Conf]
  9. Apostolos A. Kountouris, Christophe Wolinski
    High Level Pre-Synthesis Optimization Steps Using Hierarchical Conditional Dependency Graphs. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 1999, pp:1290-0 [Conf]
  10. Maya Gokhale, Christine Ahrens, Janette Frigo, Christophe Wolinski
    Communications Scheduling for Concurrent Processes on Reconfigurable Computers. [Citation Graph (0, 0)][DBLP]
    FCCM, 2004, pp:186-193 [Conf]
  11. Christophe Wolinski, Maya Gokhale, Kevin McCabe
    Fabric-Based Systems: Model, Tools, Applications. [Citation Graph (0, 0)][DBLP]
    FCCM, 2003, pp:288-289 [Conf]
  12. Reid B. Porter, Jan R. Frigo, Maya Gokhale, Christophe Wolinski, François Charot, Charles Wagner
    A Programmable, Maximal Throughput Architecture for Neighborhood Image Processing. [Citation Graph (0, 0)][DBLP]
    FCCM, 2006, pp:279-280 [Conf]
  13. Christophe Wolinski, Krzysztof Kuchcinski, Maya Gokhale
    A constraints programming approach to communication scheduling on SoPC architectures. [Citation Graph (0, 0)][DBLP]
    FPGA, 2004, pp:252- [Conf]
  14. Apostolos A. Kountouris, Christophe Wolinski
    Hierarchical Conditional Dependency Graphs as a Unifying Design Representation in the CODESIS High-Level Synthesis System. [Citation Graph (0, 0)][DBLP]
    ISSS, 2000, pp:66-72 [Conf]
  15. Apostolos A. Kountouris, Christophe Wolinski
    False Path Analysis Based on a Hierarchical Control Representation. [Citation Graph (0, 0)][DBLP]
    ISSS, 1998, pp:55-59 [Conf]
  16. Apostolos A. Kountouris, Christophe Wolinski
    Hierarchical Conditional Dependency Graphs for Mutual Exclusiveness Identification. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1999, pp:146-150 [Conf]
  17. Christophe Wolinski, Maya Gokhale, Kevin McCabe
    Polymorphous fabric-based systems: Model, tools, applications. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2003, v:49, n:4-6, pp:143-154 [Journal]
  18. Krzysztof Kuchcinski, Christophe Wolinski
    Global approach to assignment and scheduling of complex behaviors based on HCDG and constraint programming. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2003, v:49, n:12-15, pp:489-503 [Journal]
  19. Christophe Wolinski, Maya Gokhale, Kevin McCabe
    A Polymorphous Computing Fabric. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2002, v:22, n:5, pp:56-68 [Journal]
  20. Maya Gokhale, Janette Frigo, Kevin McCabe, James Theiler, Christophe Wolinski, Dominique Lavenier
    Experience with a Hybrid Processor: K-Means Clustering. [Citation Graph (0, 0)][DBLP]
    The Journal of Supercomputing, 2003, v:26, n:2, pp:131-148 [Journal]
  21. Apostolos A. Kountouris, Christophe Wolinski
    Efficient scheduling of conditional behaviors for high-level synthesis. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2002, v:7, n:3, pp:380-412 [Journal]

  22. Identification of Application Specific Instructions Based on Sub-Graph Isomorphism Constraints. [Citation Graph (, )][DBLP]


  23. Constraint-Driven Instructions Selection and Application Scheduling in the DURASE system. [Citation Graph (, )][DBLP]


  24. Automatic Selection of Application-Specific Reconfigurable Processor Extensions. [Citation Graph (, )][DBLP]


  25. A generic architecture of CCSDS Low Density Parity Check decoder for near-earth applications. [Citation Graph (, )][DBLP]


  26. A Parallel and Modular Architecture for 802.16e LDPC Codes. [Citation Graph (, )][DBLP]


  27. Communication Network Reconfiguration Overhead Optimization in Programmable Processor Array Architectures. [Citation Graph (, )][DBLP]


  28. Architecture-Driven Synthesis of Reconfigurable Cells. [Citation Graph (, )][DBLP]


  29. A New High Performance Multi Gigabit String Matching Engine. [Citation Graph (, )][DBLP]


  30. Computation Patterns Identification for Instruction Set Extensions Implemented as Reconfigurable Hardware. [Citation Graph (, )][DBLP]


  31. How Constrains Programming Can Help You in the Generation of Optimized Application Specific Reconfigurable Processor Extensions. [Citation Graph (, )][DBLP]


  32. A New Powerful Scalable Generic Multi-Standard LDPC Decoder Architecture. [Citation Graph (, )][DBLP]


  33. Optimization of Routing and Reconfiguration Overhead in Programmable Processor Array Architectures. [Citation Graph (, )][DBLP]


  34. Energy efficient sensor node implementations. [Citation Graph (, )][DBLP]


  35. Area and reconfiguration time minimization of the communication network in regular 2D reconfigurable architectures. [Citation Graph (, )][DBLP]


  36. Constraint-Driven Identification of Application Specific Instructions in the DURASE System. [Citation Graph (, )][DBLP]


Search in 0.002secs, Finished in 0.302secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002