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Publications of Author

1. Rahul Kumar, C. P. Ravikumar
   Leakage Power Estimation for Deep Submicron Circuits in an ASIC Design Environment. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2002, pp:45-50 [Conf]
   
2. C. P. Ravikumar, Rahul Kumar
   Divide-and-Conquer IDDQ Testing for Core-based System Chips. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2002, pp:761-766 [Conf]
   
3. Inderjit S. Dhillon, Subramanyam Mallela, Rahul Kumar
   Enhanced word clustering for hierarchical text classification. [Citation Graph (0, 0)][DBLP]
   KDD, 2002, pp:191-200 [Conf]
   
4. Rahul Kumar, C. P. Ravikumar
   Leakage Power Estimation for Deep Submicron Circuits in an ASIC Design Environment. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 2002, pp:45-50 [Conf]
   
5. C. P. Ravikumar, Rahul Kumar
   Divide-and-Conquer IDDQ Testing for Core-Based System Chips. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 2002, pp:761-766 [Conf]
   
6. Michael Jones, Eric Mercer, Tonglaga Bao, Rahul Kumar, Peter Lamborn
   Benchmarking Explicit State Parallel Model Checkers. [Citation Graph (0, 0)][DBLP]
   Electr. Notes Theor. Comput. Sci., 2003, v:89, n:1, pp:- [Journal]
   
7. Rahul Kumar, Eric G. Mercer
   Load Balancing Parallel Explicit State Model Checking. [Citation Graph (0, 0)][DBLP]
   Electr. Notes Theor. Comput. Sci., 2005, v:128, n:3, pp:19-34 [Journal]
   
8. Inderjit S. Dhillon, Subramanyam Mallela, Rahul Kumar
   A Divisive Information-Theoretic Feature Clustering Algorithm for Text Classification. [Citation Graph (0, 0)][DBLP]
   Journal of Machine Learning Research, 2003, v:3, n:, pp:1265-1287 [Journal]
   
9. 
   Discovering Business Process Model from Unstructured Activity Logs. [Citation Graph (, )][DBLP]
   
   
10. 
    The Static Driver Verifier Research Platform. [Citation Graph (, )][DBLP]
    
    
11. 
    MPI Collectives on Modern Multicore Clusters: Performance Optimizations and Communication Characteristics. [Citation Graph (, )][DBLP]
    
    
12. 
    Can software reliability outperform hardware reliability on high performance interconnects?: a case study with MPI over infiniband. [Citation Graph (, )][DBLP]
    
    
13. 
    Scaling alltoall collective on multi-core systems. [Citation Graph (, )][DBLP]
    
    
14. 
    Lock-Free Asynchronous Rendezvous Design for MPI Point-to-Point Communication. [Citation Graph (, )][DBLP]
    
    
15. 
    Verifying Communication Protocols Using Live Sequence Chart Specifications. [Citation Graph (, )][DBLP]
    
    
16. 
    Improving Translation of Live Sequence Charts to Temporal Logic. [Citation Graph (, )][DBLP]