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Publications of Author

1. Atsushi Kurokawa, Nobuto Ono, Tetsuro Kage, Hiroo Masuda
   DEPOGIT: dense power-ground interconnect architecture for physical design integrity. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2004, pp:517-522 [Conf]
   
2. Kenichi Shinkai, Masanori Hashimoto, Atsushi Kurokawa, Takao Onoye
   A gate delay model focusing on current fluctuation over wide-range of process and environmental variability. [Citation Graph (0, 0)][DBLP]
   ICCAD, 2006, pp:47-53 [Conf]
   
3. Zhang-cai Huang, Atsushi Kurokawa, Yasuaki Inoue
   Effective capacitance for gate delay with RC loads. [Citation Graph (0, 0)][DBLP]
   ISCAS (3), 2005, pp:2795-2798 [Conf]
   
4. Atsushi Kurokawa, Toshiki Kanamoto, Tetsuya Ibe, Akira Kasebe, Chang Wei Fong, Tetsuro Kage, Yasuaki Inoue, Hiroo Masuda
   Dummy Filling Methods for Reducing Interconnect Capacitance and Number of Fills. [Citation Graph (0, 0)][DBLP]
   ISQED, 2005, pp:586-591 [Conf]
   
5. Atsushi Kurokawa, Masaharu Yamamoto, Nobuto Ono, Tetsuro Kage, Yasuaki Inoue, Hiroo Masuda
   Capacitance and Yield Evaluations Using a 90-nm Process Technology Based on the Dense Power-Ground Interconnect Architecture. [Citation Graph (0, 0)][DBLP]
   ISQED, 2005, pp:153-158 [Conf]
   
6. 
   Modeling the Overshooting Effect for CMOS Inverter in Nanometer Technologies. [Citation Graph (, )][DBLP]