The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Sotirios Xydis: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. George Economakos, Christoforos Economakos, Sotirios Xydis
    Run-time reconfigurable solutions for adaptive control applications. [Citation Graph (0, 0)][DBLP]
    ICINCO-SPSMC, 2007, pp:208-213 [Conf]
  2. Sotirios Xydis, George Economakos, Kiamal Z. Pekmestzi
    Flexibility Inlining into Arithmetic Data-paths Exploiting A Regular Interconnection Scheme. [Citation Graph (0, 0)][DBLP]
    ICSAMOS, 2007, pp:137-144 [Conf]

  3. Construction of dual mode components for reconfiguration aware high-level synthesis. [Citation Graph (, )][DBLP]


  4. A Scheduling Postprocessor to Exploit Morphable RTL Components During High-Level Synthesis. [Citation Graph (, )][DBLP]


  5. Optimized Reconfigurable RTL Components for Performance Improvements During High-Level Synthesis. [Citation Graph (, )][DBLP]


  6. High-level synthesis with coarse grain reconfigurable components. [Citation Graph (, )][DBLP]


  7. A Reconfigurable Arithmetic Data-path Based On Regular Interconnection. [Citation Graph (, )][DBLP]


Search in 0.001secs, Finished in 0.001secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002