The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Jeong-Taek Kong: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Ikhwan Lee, Hyunsuk Kim, Peng Yang, Sungjoo Yoo, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo
    PowerViP: Soc power estimation framework at transaction level. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2006, pp:551-558 [Conf]
  2. Sungpack Hong, Sungjoo Yoo, Sheayun Lee, Sangwoo Lee, Hye Jeong Nam, Bum-Seok Yoo, Jaehyung Hwang, Donghyun Song, Janghwan Kim, Jeongeun Kim, HoonSang Jin, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo
    Creation and utilization of a virtual platform for embedded software optimization: : an industrial case study. [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2006, pp:235-240 [Conf]
  3. J. Cohn, Jeong-Taek Kong, Chris Malachowsky, Rich Tobias, B. Traw
    Design challenges for next-generation multimedia, game and entertainment platforms. [Citation Graph (0, 0)][DBLP]
    DAC, 2006, pp:459- [Conf]
  4. Young-Taek Kim, Taehun Kim, Youngduk Kim, Chulho Shin, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo
    Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:138-139 [Conf]
  5. Jeong-Taek Kong
    SoC in Nanoera: Challenges and Endless Possibility. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:2- [Conf]
  6. Chulho Shin, Young-Taek Kim, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo
    Fast Exploration of Parameterized Bus Architecture for Communication-Centric SoC Design. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:352-357 [Conf]
  7. Junhyung Um, Woo-Cheol Kwon, Sungpack Hong, Young-Taek Kim, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo, Taewhan Kim
    A systematic IP and bus subsystem modeling for platform-based system design. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:560-564 [Conf]
  8. Sang-Hoon Lee, Chang-hoon Choi, Jeong-Taek Kong, Wong-Seong Lee, Jei-Hwan Yoo
    An efficient statistical analysis methodology and its application to high-density DRAMs. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1997, pp:678-683 [Conf]
  9. Sungpack Hong, Sungjoo Yoo, HoonSang Jin, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo
    Runtime distribution-aware dynamic voltage scaling. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2006, pp:587-594 [Conf]
  10. Jeong-Taek Kong, Syed Zakir Hussain, David Overhauser
    Improving Digital MOS Macromodel Accuracy. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1995, pp:578-581 [Conf]
  11. Jeong-Taek Kong, David Overhauser
    Combining RC-Interconnect Effects with Nonlinear MOS Macromodels. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1995, pp:570-573 [Conf]
  12. HoonSang Jin, Myung-Soo Jang, Jin-Suk Song, Jin-Yong Lee, Taek-Soo Kim, Jeong-Taek Kong
    Dynamic power estimation using the probabilistic contribution measure (PCM). [Citation Graph (0, 0)][DBLP]
    ISLPED, 1999, pp:279-281 [Conf]
  13. Hyo-Sig Won, Kyo-Sun Kim, Kwang-Ok Jeong, Ki-Tae Park, Kyu-Myung Choi, Jeong-Taek Kong
    An MTCMOS design methodology and its application to mobile computing. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2003, pp:110-115 [Conf]
  14. Yong-Chan Ban, Soo-Han Choi, Ki-Hung Lee, Dong-Hyun Kim, Ji-Suk Hong, Yoo-Hyon Kim, Moon-Hyun Yoo, Jeong-Taek Kong
    A Fast Lithography Verification Framework for Litho-Friendly Layout Design. [Citation Graph (0, 0)][DBLP]
    ISQED, 2005, pp:169-174 [Conf]
  15. Young-Seok Hong, Heeseok Lee, Joon-Ho Choi, Moon-Hyun Yoo, Jeong-Taek Kong
    Analysis for Complex Power Distribution Networks Considering Densely Populated Vias. [Citation Graph (0, 0)][DBLP]
    ISQED, 2005, pp:208-212 [Conf]
  16. Won-Seok Lee, Keun-Ho Lee, Jin-Kyu Park, Tae-Kyung Kim, Young-Kwan Park, Jeong-Taek Kong
    Investigation of the capacitance deviation due to metal-fills and the effective interconnect geometry modeling. [Citation Graph (0, 0)][DBLP]
    ISQED, 2003, pp:373-376 [Conf]
  17. Young-Gu Kim, Sang-Hoon Lee, Dae-Han Kim, Jae-Woo Im, Sung-Eun Yu, Dae-Wook Kim, Young-Kwan Park, Jeong-Taek Kong
    Sensing Margin Analysis of MLC Flash Memories Using a Novel Unified Statistical Model. [Citation Graph (0, 0)][DBLP]
    ISQED, 2006, pp:185-189 [Conf]
  18. Kwan-Do Kim, Young-Kwan Park, Jun-Ha Lee, Jeong-Taek Kong, Hee-Sung Kang, Young-Wug Kim, Seok-Jin Kim
    Three Dimensional Analysis of Thermal Degradation Effects in FDSOI MOSFET's. [Citation Graph (0, 0)][DBLP]
    ISQED, 2000, pp:87-0 [Conf]
  19. Jong-Eun Koo, Kyung-Ho Lee, Young-Hoe Cheon, Joon-Ho Choi, Moon-Hyun Yoo, Jeong-Taek Kong
    A Variable Reduction Technique for the Analysis of Ultra Large-Scale Power Distribution Networks. [Citation Graph (0, 0)][DBLP]
    ISQED, 2004, pp:137-142 [Conf]
  20. Tae-Jin Kwon, Sang-Hoon Lee, Tae-Seon Kim, Hoe-Jin Lee, Young-Kwan Park, Taek-Soo Kim, Seok-Jin Kim, Jeong-Taek Kong
    Performance Improvement for High Speed Devices Using E-tests and the SPICE Model. [Citation Graph (0, 0)][DBLP]
    ISQED, 2001, pp:443-0 [Conf]
  21. Chul-Hong Park, Soo-Han Choi, Sang-Uhk Rhie, Dong-Hyun Kim, Jun-Seong Park, Tae-Hwang Jang, Ji-Soong Park, Yoo-Hyon Kim, Moon-Hyun Yoo, Jeong-Taek Kong
    A Hybrid PPC Method Based on the Empirical Etch Model for the 0.14µm DRAM Generation and Beyond. [Citation Graph (0, 0)][DBLP]
    ISQED, 2002, pp:143-147 [Conf]
  22. Jin-Kyu Park, Keun-Ho Lee, Chang-Sub Lee, Gi-Young Yang, Young-Kwan Park, Jeong-Taek Kong
    Characterizing the Current Degradation of Abnormally Structured MOS Transistors Using a 3D Poisson Solver. [Citation Graph (0, 0)][DBLP]
    ISQED, 2002, pp:322-325 [Conf]
  23. Ji-Soong Park, Chul-Hong Park, Sang-Uhk Rhie, Yoo-Hyon Kim, Moon-Hyun Yoo, Jeong-Taek Kong, Hyung-Woo Kim, Sun-Il Yoo
    An Efficient Rule-Based OPC Approach Using a DRC Tool for 0.18mum ASIC. [Citation Graph (0, 0)][DBLP]
    ISQED, 2000, pp:81-86 [Conf]
  24. Jae-Seok Yang, Jeong-Yeol Kim, Joon-Ho Choi, Moon-Hyun Yoo, Jeong-Taek Kong
    Elimination of false aggressors using the functional relationship for full-chip crosstalk analysis. [Citation Graph (0, 0)][DBLP]
    ISQED, 2003, pp:344-347 [Conf]
  25. Jeong-Taek Kong
    Tipping Point for New Design Technologies: DFM, Low Power and ESL. [Citation Graph (0, 0)][DBLP]
    ISQED, 2007, pp:9-14 [Conf]
  26. Jeong-Yeol Kim, Ho-Soon Shin, Jong-Bae Lee, Moon-Hyun Yoo, Jeong-Taek Kong
    SilcVerify: An Efficient Substrate Coupling Noise Simulation Tool for High-Speed & Nano-Scaled Memory Design. [Citation Graph (0, 0)][DBLP]
    ISQED, 2007, pp:475-480 [Conf]
  27. Jeong-Taek Kong, David Overhauser
    Methods to improve digital MOS macromodel accuracy. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:7, pp:868-881 [Journal]
  28. Jeong-Taek Kong
    CAD for nanometer silicon design challenges and success. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2004, v:12, n:11, pp:1132-1147 [Journal]
  29. Young-Taek Kim, Taehun Kim, Youngduk Kim, Chulho Shin, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo
    Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture [Citation Graph (0, 0)][DBLP]
    CoRR, 2007, v:0, n:, pp:- [Journal]

  30. Roundtable: Design and CAD Challenges for Leading-Edge Multimedia Designs. [Citation Graph (, )][DBLP]


Search in 0.003secs, Finished in 0.005secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002