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Y. Kim: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. J. Y. Lim, G. Kim, I.-S. O, J. H. Cho, Y. Kim, H. Y. Kim
    A CSIC implementation with POCSAG decoder and microcontroller for paging applications. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 1995, pp:- [Conf]
  2. H. W. Park, T. Alexander, K. S. Eo, Y. Kim
    UWGSP4: Merging Parallel and Pipelined Architectures for Imaging and Graphics. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1991, pp:399-403 [Conf]
  3. H. W. Park, K. S. Eo, D. L. Kim, B. K. Choi, Y. Kim, T. Alexander
    Two Widely Different Architectural Approaches to Computer Image Generation. [Citation Graph (0, 0)][DBLP]
    IEEE Visualization, 1991, pp:42-49 [Conf]
  4. Sangki Han, D. W. Shin, Y. Kim, Y. P. Jun, Seung Ryoul Maeng, Jung Wan Cho
    A logic programming approach to hybrid knowledge representation. [Citation Graph (0, 0)][DBLP]
    Applied Artificial Intelligence, 1988, v:2, n:2, pp:93-127 [Journal]
  5. Y. Kim, M. Kim
    A Step-wise-overlapped Parallel Annealing Algorithm on a Message-passing Multiprocessor System. [Citation Graph (0, 0)][DBLP]
    Concurrency - Practice and Experience, 1990, v:2, n:2, pp:123-148 [Journal]
  6. Y. Kim
    A method for the classification and retrieval problem of reusable software resources. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Manage., 1997, v:33, n:4, pp:513-522 [Journal]
  7. H. Lu, Y. Kim, John M. M. Anderson
    Improved Poisson intensity estimation: denoising application using Poisson data. [Citation Graph (0, 0)][DBLP]
    IEEE Transactions on Image Processing, 2004, v:13, n:8, pp:1128-1135 [Journal]
  8. E. Miranda, J. Molina, Y. Kim, H. Iwai
    Degradation of high-K LA2O3 gate dielectrics using progressive electrical stress. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1365-1369 [Journal]
  9. H. Jeong, Y. Kim
    A Systolic Architecture and Implementation of Feedback Network for Blind Source Separation. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2007, v:47, n:2, pp:117-126 [Journal]

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