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De-Sheng Chen: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Chang-Tzu Lin, De-Sheng Chen, Yi-Wen Wang
    Robust fixed-outline floorplanning through evolutionary search. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2004, pp:42-44 [Conf]
  2. Zeng-Wei Hong, Jim-Min Lin, De-Sheng Chen, Hewijin Christine Jiau
    DSIAS: A Software Architectural Style for Distributed Software Integration Systems. [Citation Graph (0, 0)][DBLP]
    COMPSAC, 2001, pp:291-296 [Conf]
  3. De-Sheng Chen, Majid Sarrafzadeh
    An Exact Algorithm for Low Power Library-Specific Gate Re-Sizing. [Citation Graph (0, 0)][DBLP]
    DAC, 1996, pp:783-788 [Conf]
  4. De-Sheng Chen, Majid Sarrafzadeh
    A wire-length minimization algorithm for single-layer layouts. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1992, pp:390-393 [Conf]
  5. Chang-Tzu Lin, De-Sheng Chen, Yi-Wen Wang
    GPE: A New Representation for VLSI Floorplan Problem. [Citation Graph (0, 0)][DBLP]
    ICCD, 2002, pp:42-44 [Conf]
  6. De-Sheng Chen, Majid Sarrafzadeh, Gary K. H. Yeap
    State Encoding of Finite State Machines for Low Power Design. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1995, pp:2309-2312 [Conf]
  7. Ching-Chung Hu, De-Sheng Chen, Yi-Wen Wang
    Fast multilevel floorplanning for large scale modules. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2004, pp:205-208 [Conf]
  8. Chang-Tzu Lin, De-Sheng Chen, Yi-Wen Wang, Hsin-Hsien Ho
    Modem floorplanning with abutment and fixed-outline constraints. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 2005, pp:6214-6217 [Conf]
  9. Chang-Tzu Lin, De-Sheng Chen, Yi-Wen Wang
    Modern Floorplanning with Boundary and Fixed-outline Constraints via Genetic Clustering Algorithm. [Citation Graph (0, 0)][DBLP]
    Journal of Circuits, Systems, and Computers, 2006, v:15, n:1, pp:107-128 [Journal]
  10. Chang-Tzu Lin, Tai-Wei Kung, De-Sheng Chen, Yi-Wen Wang, Ching-Hwa Cheng
    Noise-Aware Floorplanning for Fast Power Supply Network Design. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:2028-2031 [Conf]

  11. An Agent-Based Workflow System for Assisting in IC Design. [Citation Graph (, )][DBLP]


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