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Publications of Author

1. Cheng-Hung Lin, Yung-Chang Huang, Shih-Chieh Chang, Wen-Ben Jone
   Design and design automation of rectification logic for engineering change. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2005, pp:1006-1009 [Conf]
   
2. Cheng-Hung Lin, Chih-Tsun Huang, Chang-Ping Jiang, Shih-Chieh Chang
   Optimization of regular expression pattern matching circuits on FPGA. [Citation Graph (0, 0)][DBLP]
   DATE Designers' Forum, 2006, pp:12-17 [Conf]
   
3. Tsung-Han Tsai, Cheng-Hung Lin, An-Yeu Wu
   A memory-reduced log-MAP kernel for turbo decoder. [Citation Graph (0, 0)][DBLP]
   ISCAS (2), 2005, pp:1032-1035 [Conf]
   
4. Yu-Min Kuo, Cheng-Hung Lin, Chun-Yao Wang, Shih-Chieh Chang, Pei-Hsin Ho
   Intelligent Random Vector Generator Based on Probability Analysis of Circuit Structure. [Citation Graph (0, 0)][DBLP]
   ISQED, 2007, pp:344-349 [Conf]
   
5. 
   A 52-mW 8.29mm² 19-mode LDPC decoder chip for mobile WiMAX applications. [Citation Graph (, )][DBLP]
   
   
6. 
   Hierarchical state machine architecture for regular expression pattern matching. [Citation Graph (, )][DBLP]
   
   
7. 
   Low-power traceback MAP decoding for double-binary convolutional turbo decoder. [Citation Graph (, )][DBLP]
   
   
8. 
   Optimization of pattern matching algorithm for memory based architecture. [Citation Graph (, )][DBLP]
   
   
9. 
   High-throughput dual-mode single/double binary map processor design for wireless wan. [Citation Graph (, )][DBLP]
   
   
10. 
    A New Early Termination Scheme of Iterative Turbo Decoding Using Decoding Threshold. [Citation Graph (, )][DBLP]