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Guang-Ming Wu: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]
Publications of Author
- Jai-Ming Lin, Guang-Ming Wu, Yao-Wen Chang, Jen-Hui Chuang
Placement with symmetry constraints for analog layout design using TCG-S. [Citation Graph (0, 0)][DBLP]
ASP-DAC, 2005, pp:1135-1137 [Conf] - Yun-Chih Chang, Yao-Wen Chang, Guang-Ming Wu, Shu-Wei Wu
B*-Trees: a new representation for non-slicing floorplans. [Citation Graph (0, 0)][DBLP]
DAC, 2000, pp:458-463 [Conf] - Guang-Ming Wu, Michael Shyu, Yao-Wen Chang
Universal Switch Blocks for Three-Dimensional FPGA Design. [Citation Graph (0, 0)][DBLP]
FPGA, 1999, pp:254- [Conf] - Mango Chia-Tso Chao, Guang-Ming Wu, Iris Hui-Ru Jiang, Yao-Wen Chang
A clustering- and probability-based approach for time-multiplexed FPGA partitioning. [Citation Graph (0, 0)][DBLP]
ICCAD, 1999, pp:364-369 [Conf] - Michael Shyu, Yu-Dong Chang, Guang-Ming Wu, Yao-Wen Chang
Generic Universal Switch Blocks. [Citation Graph (0, 0)][DBLP]
ICCD, 1999, pp:311-314 [Conf] - Guang-Ming Wu, Yun-Chih Chang, Yao-Wen Chang
Rectilinear Block Placement Using B*-Trees. [Citation Graph (0, 0)][DBLP]
ICCD, 2000, pp:351-356 [Conf] - Guang-Ming Wu, Jai-Ming Lin, Yao-Wen Chang
An Algorithm for Dynamically Reconfigurable FPGA Placement. [Citation Graph (0, 0)][DBLP]
ICCD, 2001, pp:501-504 [Conf] - Guang-Ming Wu, Jai-Ming Lin, Mango Chia-Tso Chao, Yao-Wen Chang
Generic ILP-Based Approaches for Dynamically Reconfigurable FPGA Partitioning. [Citation Graph (0, 0)][DBLP]
ICCD, 2001, pp:335-347 [Conf] - Derchian Tsaih, Guang-Ming Wu, Chin-Bin Wang, Yun-Ting Ho
An Efficient Broadcast Scheme for Wireless Data Schedule Under a New Data Affinity Model. [Citation Graph (0, 0)][DBLP]
ICOIN, 2005, pp:390-400 [Conf] - Guang-Ming Wu, Yao-Wen Chang
Switch-matrix architecture and routing for FPDs. [Citation Graph (0, 0)][DBLP]
ISPD, 1998, pp:158-163 [Conf] - Guang-Ming Wu, Mango Chia-Tso Chao, Yao-Wen Chang
A clustering- and probability-based approach for time-multiplexed FPGA partitioning. [Citation Graph (0, 0)][DBLP]
Integration, 2004, v:38, n:2, pp:245-265 [Journal] - Michael Shyu, Guang-Ming Wu, Yu-Dong Chang, Yao-Wen Chang
Generic Universal Switch Blocks. [Citation Graph (0, 0)][DBLP]
IEEE Trans. Computers, 2000, v:49, n:4, pp:348-359 [Journal] - Guang-Ming Wu, Yao-Wen Chang
Quasi-Universal Switch Matrices for FPD Design. [Citation Graph (0, 0)][DBLP]
IEEE Trans. Computers, 1999, v:48, n:10, pp:1107-1122 [Journal] - Guang-Ming Wu, Jai-Ming Lin, Yao-Wen Chang
Generic ILP-based approaches for time-multiplexed FPGA partitioning. [Citation Graph (0, 0)][DBLP]
IEEE Trans. on CAD of Integrated Circuits and Systems, 2001, v:20, n:10, pp:1266-1274 [Journal] - Yao-Wen Chang, Kai Zhu, Guang-Ming Wu, D. F. Wong, C. K. Wong
Analysis of FPGA/FPIC switch modules. [Citation Graph (0, 0)][DBLP]
ACM Trans. Design Autom. Electr. Syst., 2003, v:8, n:1, pp:11-37 [Journal] - Guang-Ming Wu, Yun-Chih Chang, Yao-Wen Chang
Rectilinear block placement using B*-trees. [Citation Graph (0, 0)][DBLP]
ACM Trans. Design Autom. Electr. Syst., 2003, v:8, n:2, pp:188-202 [Journal] - Guang-Ming Wu, Jai-Ming Lin, Yao-Wen Chang
Performance-driven placement for dynamically reconfigurable FPGAs. [Citation Graph (0, 0)][DBLP]
ACM Trans. Design Autom. Electr. Syst., 2002, v:7, n:4, pp:628-642 [Journal] - Guang-Ming Wu
An efficient data placement for query-set-based broadcasting in mobile environments. [Citation Graph (0, 0)][DBLP]
Computer Communications, 2007, v:30, n:5, pp:1075-1081 [Journal]
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