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Amir H. Salek:
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Publications of Author
- Jinan Lou, Amir H. Salek, Massoud Pedram
An Integrated Flow for Technology Remapping and Placement of Sub-half-micron Circuits. [Citation Graph (0, 0)][DBLP] ASP-DAC, 1998, pp:295-300 [Conf]
- Amir H. Salek, Jinan Lou, Massoud Pedram
A DSM Design Flow: Putting Floorplanning, Technology-Napping, and Gate-Placement Together. [Citation Graph (0, 0)][DBLP] DAC, 1998, pp:128-134 [Conf]
- Amir H. Salek, Jinan Lou, Massoud Pedram
MERLIN: Semi-Order-Independent Hierarchical Buffered Routing Tree Generation Using Local Neighborhood Search. [Citation Graph (0, 0)][DBLP] DAC, 1999, pp:472-478 [Conf]
- Jinan Lou, Amir H. Salek, Massoud Pedram
An exact solution to simultaneous technology mapping and linear placement problem. [Citation Graph (0, 0)][DBLP] ICCAD, 1997, pp:671-675 [Conf]
- Amir H. Salek, Jinan Lou, Massoud Pedram
A simultaneous routing tree construction and fanout optimization algorithm. [Citation Graph (0, 0)][DBLP] ICCAD, 1998, pp:625-630 [Conf]
- Amir H. Salek, Jinan Lou, Massoud Pedram
An integrated logical and physical design flow for deep submicron circuits. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:9, pp:1305-1315 [Journal]
- Amir H. Salek, Jinan Lou, Massoud Pedram
Hierarchical buffered routing tree generation. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:5, pp:554-567 [Journal]
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