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Wangqi Qiu: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Xiang Lu, Zhuo Li, Wangqi Qiu, D. M. H. Walker, Weiping Shi
    Longest path selection for delay test under process variation. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2004, pp:98-103 [Conf]
  2. Wangqi Qiu, Xiang Lu, Zhuo Li, D. M. H. Walker, Weiping Shi
    CodSim -- A Combined Delay Fault Simulator. [Citation Graph (0, 0)][DBLP]
    DFT, 2003, pp:79-0 [Conf]
  3. Xiang Lu, Zhuo Li, Wangqi Qiu, D. M. H. Walker, Weiping Shi
    PARADE: PARAmetric Delay Evaluation under Process Variation. [Citation Graph (0, 0)][DBLP]
    ISQED, 2004, pp:276-280 [Conf]
  4. Wangqi Qiu, D. M. H. Walker
    An Efficient Algorithm for Finding the K Longest Testable Paths Through Each Gate in a Combinational Circuit. [Citation Graph (0, 0)][DBLP]
    ITC, 2003, pp:592-601 [Conf]
  5. Wangqi Qiu, Jing Wang, D. M. H. Walker, Divya Reddy, Zhuo Li, Weiping Shi, Hari Balachandran
    K Longest Paths Per Gate (KLPG) Test Generation for Scan-Based Sequential Circuits. [Citation Graph (0, 0)][DBLP]
    ITC, 2004, pp:223-231 [Conf]
  6. Xiang Lu, Zhuo Li, Wangqi Qiu, D. M. H. Walker, Weiping Shi
    A Circuit Level Fault Model for Resistive Shorts of MOS Gate Oxide. [Citation Graph (0, 0)][DBLP]
    MTV, 2004, pp:97-102 [Conf]
  7. Wangqi Qiu, D. M. H. Walker
    Testing the Path Delay Faults of ISCAS85 Circuit c6288. [Citation Graph (0, 0)][DBLP]
    MTV, 2003, pp:19-0 [Conf]
  8. Wangqi Qiu, Weiping Shi
    Minimum moment Steiner trees. [Citation Graph (0, 0)][DBLP]
    SODA, 2004, pp:488-495 [Conf]
  9. Zhuo Li, Xiang Lu, Wangqi Qiu, Weiping Shi, D. M. H. Walker
    A Circuit Level Fault Model for Resistive Opens and Bridges. [Citation Graph (0, 0)][DBLP]
    VTS, 2003, pp:379-384 [Conf]
  10. Wangqi Qiu, Xiang Lu, Jing Wang, Zhuo Li, D. M. H. Walker, Weiping Shi
    A Statistical Fault Coverage Metric for Realistic Path Delay Faults. [Citation Graph (0, 0)][DBLP]
    VTS, 2004, pp:37-42 [Conf]
  11. Jing Wang, Xiang Lu, Wangqi Qiu, Ziding Yue, Steve Fancler, Weiping Shi, D. M. H. Walker
    Static Compaction of Delay Tests Considering Power Supply Noise. [Citation Graph (0, 0)][DBLP]
    VTS, 2005, pp:235-240 [Conf]
  12. Xiang Lu, Zhuo Li, Wangqi Qiu, D. M. H. Walker, Weiping Shi
    Longest-path selection for delay test under process variation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:12, pp:1924-1929 [Journal]
  13. Zhuo Li, Xiang Lu, Wangqi Qiu, Weiping Shi, D. M. H. Walker
    A circuit level fault model for resistive bridges. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2003, v:8, n:4, pp:546-559 [Journal]

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