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Publications of Author

1. Somsubhra Mondal, Seda Ogrenci Memik
   Resource sharing in pipelined CDFG synthesis. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2005, pp:795-798 [Conf]
   
2. Rajarshi Mukherjee, Somsubhra Mondal, Seda Ogrenci Memik
   A Sensor Distribution Algorithm for FPGAs with Minimal Dynamic Reconfiguration Overhead. [Citation Graph (0, 0)][DBLP]
   ERSA, 2006, pp:56-62 [Conf]
   
3. Somsubhra Mondal, Seda Ogrenci Memik, Nikolaos Bellas
   Pre-synthesis Queue Size Estimation of Streaming Data Flow Graphs. [Citation Graph (0, 0)][DBLP]
   FCCM, 2006, pp:325-326 [Conf]
   
4. Somsubhra Mondal, Seda Ogrenci Memik, Debasish Das
   Hierarchical LUT structures for leakage power reduction (abstract only). [Citation Graph (0, 0)][DBLP]
   FPGA, 2005, pp:272- [Conf]
   
5. Somsubhra Mondal, Seda Ogrenci Memik
   Fine-grain leakage optimization in SRAM based FPGAs. [Citation Graph (0, 0)][DBLP]
   ACM Great Lakes Symposium on VLSI, 2005, pp:238-243 [Conf]
   
6. Rajarshi Mukherjee, Somsubhra Mondal, Seda Ogrenci Memik
   Thermal sensor allocation and placement for reconfigurable systems. [Citation Graph (0, 0)][DBLP]
   ICCAD, 2006, pp:437-442 [Conf]
   
7. Somsubhra Mondal, Seda Ogrenci Memik
   A low power FPGA routing architecture. [Citation Graph (0, 0)][DBLP]
   ISCAS (2), 2005, pp:1222-1225 [Conf]
   
8. Somsubhra Mondal, Seda Ogrenci Memik
   Power Optimization Techniques for SRAM-Based FPGAs. [Citation Graph (0, 0)][DBLP]
   FPL, 2006, pp:1-2 [Conf]
   
9. Somsubhra Mondal, Seda Ogrenci Memik, Nikolaos Bellas
   Pre-Synthesis Area Estimation of Reconfigurable Streaming Accelerators. [Citation Graph (0, 0)][DBLP]
   FPL, 2006, pp:1-4 [Conf]
   
10. Somsubhra Mondal, Rajarshi Mukherjee, Seda Ogrenci Memik
    Fine-grain thermal profiling and sensor insertion for FPGAs. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]