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Amit Mehrotra: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]
Publications of Author
- Makram M. Mansour, Mohammad M. Mansour, Amit Mehrotra
Analysis of MOS cross-coupled LC-tank oscillators using short-channel device equations. [Citation Graph (0, 0)][DBLP]
ASP-DAC, 2004, pp:181-185 [Conf] - Kaustav Banerjee, Amit Mehrotra
Analysis of On-Chip Inductance Effects using a Novel Performance Optimization Methodology for Distributed RLC Interconnects. [Citation Graph (0, 0)][DBLP]
DAC, 2001, pp:798-803 [Conf] - Kaustav Banerjee, Amit Mehrotra, Alberto L. Sangiovanni-Vincentelli, Chenming Hu
On Thermal Effects in Deep Sub-Micron VLSI Interconnects. [Citation Graph (0, 0)][DBLP]
DAC, 1999, pp:885-891 [Conf] - Anirban Basu, Sheng-Chih Lin, Vineet Wason, Amit Mehrotra, Kaustav Banerjee
Simultaneous optimization of supply and threshold voltages for low-power and high-performance circuits in the leakage dominant era. [Citation Graph (0, 0)][DBLP]
DAC, 2004, pp:884-887 [Conf] - Alper Demir, Amit Mehrotra, Jaijeet S. Roychowdhury
Phase Noise in Oscillators: A Unifying Theory and Numerical Methods for Characterisation. [Citation Graph (0, 0)][DBLP]
DAC, 1998, pp:26-31 [Conf] - Sunil P. Khatri, Amit Mehrotra, Robert K. Brayton, Ralph H. J. M. Otten, Alberto L. Sangiovanni-Vincentelli
A Novel VLSI Layout Fabric for Deep Sub-Micron Applications. [Citation Graph (0, 0)][DBLP]
DAC, 1999, pp:491-496 [Conf] - Shukri J. Souri, Kaustav Banerjee, Amit Mehrotra, Krishna Saraswat
Multiple Si layer ICs: motivation, performance analysis, and design implications. [Citation Graph (0, 0)][DBLP]
DAC, 2000, pp:213-220 [Conf] - Makram M. Mansour, Amit Mehrotra
Model-Order Reduction Based on PRONY's Method. [Citation Graph (0, 0)][DBLP]
DATE, 2003, pp:10530-10535 [Conf] - Kaustav Banerjee, Amit Mehrotra
Coupled Analysis of Electromigration Reliability and Performance in ULSI Signal Nets. [Citation Graph (0, 0)][DBLP]
ICCAD, 2001, pp:158-164 [Conf] - Amit Mehrotra
Noise Analysis of Phase-Locked Loops. [Citation Graph (0, 0)][DBLP]
ICCAD, 2000, pp:277-282 [Conf] - Amit Mehrotra, Suihua Lu, David C. Lee, Amit Narayan
Steady-state analysis of voltage and current controlled oscillators. [Citation Graph (0, 0)][DBLP]
ICCAD, 2005, pp:618-623 [Conf] - Amit Mehrotra, Shaz Qadeer, Vigyan Singhal, Robert K. Brayton, Adnan Aziz, Alberto L. Sangiovanni-Vincentelli
Sequential optimisation without state space exploration. [Citation Graph (0, 0)][DBLP]
ICCAD, 1997, pp:208-215 [Conf] - Amit Mehrotra, Alberto L. Sangiovanni-Vincentelli
Noise analysis of non-autonomous radio frequency circuits. [Citation Graph (0, 0)][DBLP]
ICCAD, 1999, pp:55-60 [Conf] - Amit Mehrotra, Shaz Qadeer, Rajeev K. Ranjan, Randy H. Katz
Benchmarking and Analysis of Architectures for CAD Applications. [Citation Graph (0, 0)][DBLP]
ICCD, 1997, pp:670-675 [Conf] - Suihua Lu, Amit Narayan, Amit Mehrotra
Continuation method in multitone harmonic balance. [Citation Graph (0, 0)][DBLP]
ISCAS (5), 2004, pp:520-523 [Conf] - M. M. Mansour, Amit Mehrotra
Efficient core designs based on parameterized macrocells with accurate delay models. [Citation Graph (0, 0)][DBLP]
ISCAS (5), 2003, pp:517-520 [Conf] - Makram M. Mansour, Amit Mehrotra, William W. Walker, Amit Narayan
Analysis techniques for obtaining the steady-state solution of MOS LC oscillators. [Citation Graph (0, 0)][DBLP]
ISCAS (5), 2004, pp:512-515 [Conf] - Kaustav Banerjee, Amit Mehrotra
Inductance Aware Interconnect Scaling. [Citation Graph (0, 0)][DBLP]
ISQED, 2002, pp:43-47 [Conf] - Makram M. Mansour, Amit Mehrotra
Reduced-Order Modeling Based on PRONY's and SHANK's Methods via the Bilinear Transformation. [Citation Graph (0, 0)][DBLP]
ISQED, 2003, pp:299-0 [Conf] - Makram M. Mansour, Mohammad M. Mansour, Amit Mehrotra
Parameterized Macrocells with Accurate Delay Models for Core-Based Designs. [Citation Graph (0, 0)][DBLP]
ISQED, 2003, pp:319-0 [Conf] - Amit Mehrotra
Noise in Radio Frequency Circuits: Analysis and Design Implications. [Citation Graph (0, 0)][DBLP]
ISQED, 2001, pp:469-476 [Conf] - Man Lung Mui, Kaustav Banerjee, Amit Mehrotra
Power Supply Optimization in sub-130 nm Leakage Dominant Technologies . [Citation Graph (0, 0)][DBLP]
ISQED, 2004, pp:409-414 [Conf] - Makram M. Mansour, Mohammad M. Mansour, Amit Mehrotra
Modified Sakurai-Newton Current Model and its Applications to CMOS Digital Circuit Design. [Citation Graph (0, 0)][DBLP]
ISVLSI, 2003, pp:62-69 [Conf] - Makram M. Mansour, Amit Mehrotra
Reduced-order Modelling using PRONY's Approximation Method. [Citation Graph (0, 0)][DBLP]
Modelling and Simulation, 2003, pp:650-655 [Conf] - Kaustav Banerjee, Amit Mehrotra
Analysis of on-chip inductance effects for distributed RLC interconnects. [Citation Graph (0, 0)][DBLP]
IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:8, pp:904-915 [Journal] - Man Lung Mui, Kaustav Banerjee, Amit Mehrotra
Supply and power optimization in leakage-dominant technologies. [Citation Graph (0, 0)][DBLP]
IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:9, pp:1362-1371 [Journal] - Igor Vytyaz, David C. Lee, Suihua Lu, Amit Mehrotra, Un-Ku Moon, Kartikeya Mayaram
Parameter Finding Methods for Oscillators with a Specified Oscillation Frequency. [Citation Graph (0, 0)][DBLP]
DAC, 2007, pp:424-429 [Conf] - Igor Vytyaz, David C. Lee, Suihua Lu, Amit Mehrotra, Un-Ku Moon, Kartikeya Mayaram
Periodic Steady-State Analysis of Oscillators with a Specified Oscillation Frequency. [Citation Graph (0, 0)][DBLP]
ISCAS, 2007, pp:1073-1076 [Conf]
A robust and efficient harmonic balance (HB) using direct solution of HB Jacobian. [Citation Graph (, )][DBLP]
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