Search the dblp DataBase

Publications of Author

1. Takahiro Murooka, Atsushi Takahara, Toshiaki Miyazaki, Akihiro Tsutsui
   An Architecture-oriented Routing Method for FPGAs Having Rich Hierarchical Routing Resources. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 1998, pp:527-533 [Conf]
   
2. Naohisa Ohta, Kazuhisa Yamada, Akihiro Tsutsui, Hiroshi Nakada
   New Application of FPLs to Programmable Digital Communication Cirucits. [Citation Graph (0, 0)][DBLP]
   FPL, 1992, pp:106-111 [Conf]
   
3. Atsushi Takahara, Toshiaki Miyazaki, Takahiro Murooka, Masaru Katayama, Kazuhiro Hayashi, Akihiro Tsutsui, Takaki Ichimori, Ken-nosuke Fukami
   More Wires and Fewer LUTs: A Design Methodology for FPGAs. [Citation Graph (0, 0)][DBLP]
   FPGA, 1998, pp:12-19 [Conf]
   
4. Akihiro Tsutsui, Toshiaki Miyazaki
   YARDS: FPGA/MPU Hybrid Architecture for Telecommunication Data Processing. [Citation Graph (0, 0)][DBLP]
   FPGA, 1997, pp:93-100 [Conf]
   
5. Toshiaki Miyazaki, Hiroshi Nakada, Akihiro Tsutsui, Kazuhisa Yamada, Naohisa Ohta
   A Speed-Up Technique for Synchronous Circuits Realized as LUT-Based FPGAs. [Citation Graph (0, 0)][DBLP]
   FPL, 1994, pp:89-98 [Conf]
   
6. Toshiaki Miyazaki, Akihiro Tsutsui, Kenji Ishii, Naohisa Ohta
   FACT: Co-evaluation Environment for FPGA Architecture and CAD System. [Citation Graph (0, 0)][DBLP]
   FPL, 1996, pp:34-43 [Conf]
   
7. Toshiaki Miyazaki, Atsushi Takahara, Masaru Katayama, Takahiro Murooka, Takaki Ichimori, Ken-nosuke Fukami, Akihiro Tsutsui, Kazuhiro Hayashi
   CAD-oriented FPGA and dedicated CAD system for telecommunications. [Citation Graph (0, 0)][DBLP]
   FPL, 1997, pp:11-20 [Conf]
   
8. Toshiaki Miyazaki, Kazuhisa Yamada, Akihiro Tsutsui, Hiroshi Nakada, Naohisa Ohta
   Telecommunication-Oriented FPGA and Dedicated CAD System. [Citation Graph (0, 0)][DBLP]
   FPL, 1995, pp:54-67 [Conf]
   
9. Minoru Inamori, Kenji Ishii, Akihiro Tsutsui, Kazuhiro Shirakawa, Hiroshi Nakada, Toshiaki Miyazaki
   A New Processor Architecture for Digital Signal Transport Systems. [Citation Graph (0, 0)][DBLP]
   ICCD, 1997, pp:157-162 [Conf]
   
10. Naohisa Ohta, Hiroshi Nakada, Kazuhisa Yamada, Akihiro Tsutsui, Toshiaki Miyazaki
    PROTEUS: Programmable Hardware for Telecommunication Systems. [Citation Graph (0, 0)][DBLP]
    ICCD, 1994, pp:178-183 [Conf]
    
11. Akihiro Tsutsui, Toshiaki Miyazaki, Kazuhisa Yamada, Naohisa Ohta
    Special purpose FPGA for high-speed digital telecommunication systems. [Citation Graph (0, 0)][DBLP]
    ICCD, 1995, pp:486-491 [Conf]
    
12. Norbert Imlig, Akihiro Tsutsui
    Performance Estimation of Embedded Software with Pipeline and Cache Hazard Modeling. [Citation Graph (0, 0)][DBLP]
    ISHPC, 1997, pp:131-142 [Conf]
    
13. Hiroyuki Maeomichi, Ryutaro Kawamura, Akihiro Tsutsui, Kouji Yata
    A QoS Management Framework based on COP oriented Communication Resource Coordination. [Citation Graph (0, 0)][DBLP]
    Middleware Workshops, 2003, pp:158-162 [Conf]
    
14. Toshiaki Miyazaki, Hiroshi Nakada, Akihiro Tsutsui, Kazuhisa Yamada, Naohisa Ohta
    Performance improvement technique for synchronous circuits realized as LUT-based FPGAs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1995, v:3, n:3, pp:455-459 [Journal]
    
15. Akihiro Tsutsui, Toshiaki Miyazaki
    ANT-on-YARDS: FPGA/MPU hybrid architecture for telecommunication data processing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1998, v:6, n:2, pp:199-211 [Journal]
    
16. Toshiaki Miyazaki, Atsushi Takahara, Takahiro Murooka, Masaru Katayama, Takaki Ichimori, Kazuhiro Shirakawa, Akihiro Tsutsui, K. Fukami
    PROTEUS-Lite project: dedicated to developing a telecommunication-oriented FPGA and its applications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2000, v:8, n:4, pp:401-414 [Journal]