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Yu Pu: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Yu Pu, Yajun Ha
    An automated, efficient and static bit-width optimization methodology towards maximum bit-width-to-error tradeoff with affine arithmetic model. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2006, pp:886-891 [Conf]

  2. Statistical noise margin estimation for sub-threshold combinational circuits. [Citation Graph (, )][DBLP]


  3. Xetal-Pro: an ultra-low energy and high throughput SIMD processor. [Citation Graph (, )][DBLP]


  4. Vt balancing and device sizing towards high yield of sub-threshold static logic gates. [Citation Graph (, )][DBLP]


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