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Toshihiro Hanawa: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Takashi Midorikawa, Takayuki Kamei, Toshihiro Hanawa, Hideharu Amano
    The MINC (Multistage Interconnection Network with Cache Control Mechanism) Chip. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 1998, pp:337-338 [Conf]
  2. Toshihiro Hanawa, Hideharu Amano, Yoshifumi Fujikawa
    Multistage Interconnection Networks with Multiple Outlets. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1994, pp:1-8 [Conf]
  3. Akira Funahashi, Toshihiro Hanawa, Hideharu Amano, Tomohiro Kudoh
    Adaptive Routing on the Recursive Diagonal Torus. [Citation Graph (0, 0)][DBLP]
    ISHPC, 1997, pp:171-182 [Conf]
  4. Toshihiro Hanawa, Toshiya Minai, Yasuki Tanabe, Hideharu Amano
    Implementation of ISIS-SimpleScalar. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2005, pp:117-123 [Conf]
  5. Yasuki Tanabe, Takashi Midorikawa, Daisuke Shiraishi, Masayoshi Shigeno, Toshihiro Hanawa, Hideharu Amano
    Performance Evaluation of 3-Dimensional MIN with Cache Consistency Maintenance Mechanism. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2003, pp:1148-1154 [Conf]
  6. Takashi Midorikawa, Daisuke Shiraishi, Masayoshi Shigeno, Yasuki Tanabe, Toshihiro Hanawa, Hideharu Amano
    The performance of SNAIL-2 (a SSS-MIN connected multiprocessor with cache coherent mechanism). [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 2005, v:31, n:3-4, pp:352-370 [Journal]
  7. Junji Yamamoto, Takashi Fujiwara, T. Komeda, Takayuki Kamei, Toshihiro Hanawa, Hideharu Amano
    Performance evaluation of SNAIL: A multiprocessor based on the simple serial synchronized multistage interconnection network architecture. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 1999, v:25, n:9, pp:1081-1103 [Journal]

  8. D-Cloud: Design of a Software Testing Environment for Reliable Distributed Systems Using Cloud Computing Technology. [Citation Graph (, )][DBLP]

  9. RI2N: High-bandwidth and fault-tolerant network with multi-link Ethernet for PC clusters. [Citation Graph (, )][DBLP]

  10. A dynamic routing control system for high-performance PC cluster with multi-path Ethernet connection. [Citation Graph (, )][DBLP]

  11. RI2N/DRV: Multi-link ethernet for high-bandwidth and fault-tolerant network on PC clusters. [Citation Graph (, )][DBLP]

  12. Towards an Open Dependable Operating System. [Citation Graph (, )][DBLP]

  13. Evaluation of Multicore Processors for Embedded Systems by Parallel Benchmark Program Using OpenMP. [Citation Graph (, )][DBLP]

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