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Wendy Belluomini: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Chris J. Myers, Wendy Belluomini, Kip Kallpack, Eric Peskin, Hao Zheng
    Timed circuits: a new paradigm for high-speed design. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2001, pp:335-340 [Conf]
  2. Wendy Belluomini, Chris J. Myers
    Efficient Timing Analysis Algorithms for Timed State Space Exploration. [Citation Graph (0, 0)][DBLP]
    ASYNC, 1997, pp:88-100 [Conf]
  3. Wendy Belluomini, Chris J. Myers, H. Peter Hofstee
    Verification of Delayed-Reset Domino Circuits Using ATACS. [Citation Graph (0, 0)][DBLP]
    ASYNC, 1999, pp:3-12 [Conf]
  4. Wendy Belluomini, Chris J. Myers
    Verification of Timed Systems Using POSETs. [Citation Graph (0, 0)][DBLP]
    CAV, 1998, pp:403-415 [Conf]
  5. Ramyanshu Datta, Jacob A. Abraham, Robert K. Montoye, Wendy Belluomini, Hung Ngo, Chandler McDowell, Jente B. Kuang, Kevin J. Nowka
    A low latency and low power dynamic Carry Save Adder. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2004, pp:477-480 [Conf]
  6. Robert Thacker, Wendy Belluomini, Chris J. Myers
    Timed Circuit Synthesis Using Implicit Methods. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1999, pp:181-188 [Conf]
  7. Wendy Belluomini, Damir Jamsek, Andrew K. Martin, Chandler McDowell, Robert K. Montoye, Hung C. Ngo, Jun Sawada
    Limited switch dynamic logic circuits for high-speed low-power circuit design. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2006, v:50, n:2-3, pp:277-286 [Journal]
  8. Wendy Belluomini, Chris J. Myers
    Timed state space exploration using POSETs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:5, pp:501-520 [Journal]
  9. Wendy Belluomini, Chris J. Myers, H. Peter Hofstee
    Timed circuit verification using TEL structures. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2001, v:20, n:1, pp:129-146 [Journal]

  10. Evaluating the impact of Undetected Disk Errors in RAID systems. [Citation Graph (, )][DBLP]


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