|
Search the dblp DataBase
Noriyuki Miura:
[Publications]
[Author Rank by year]
[Co-authors]
[Prefers]
[Cites]
[Cited by]
Publications of Author
- Noriyuki Miura, Naoki Kato, Tadahiro Kuroda
Practical methodology of post-layout gate sizing for 15% more power saving. [Citation Graph (0, 0)][DBLP] ASP-DAC, 2004, pp:434-437 [Conf]
- Amit Kumar 0002, Noriyuki Miura, Muhammad Muqsith, Tadahiro Kuroda
Active Crosstalk Cancel for High-Density Inductive Inter-chip Wireless Communication. [Citation Graph (0, 0)][DBLP] VLSI Design, 2006, pp:271-276 [Conf]
A 1Tb/s 3W Inductive-Coupling Transceiver Chip. [Citation Graph (, )][DBLP]
MuCCRA-Cube: A 3D dynamically reconfigurable processor with inductive-coupling link. [Citation Graph (, )][DBLP]
Search in 0.001secs, Finished in 0.001secs
|