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Tadahiro Kuroda: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Noriyuki Miura, Naoki Kato, Tadahiro Kuroda
    Practical methodology of post-layout gate sizing for 15% more power saving. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2004, pp:434-437 [Conf]
  2. Kimiyoshi Usami, Mutsunori Igarashi, Takashi Ishikawa, Masahiro Kanazawa, Masafumi Takahashi, Mototsugu Hamada, Hideho Arakida, Toshihiro Terazawa, Tadahiro Kuroda
    Design Methodology of Ultra Low-Power MPEG4 Codec Core Exploiting Voltage Scaling Techniques. [Citation Graph (0, 0)][DBLP]
    DAC, 1998, pp:483-488 [Conf]
  3. Tadahiro Kuroda
    Optimization and control of VDD and VTH for low-power, high-speed CMOS design. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2002, pp:28-34 [Conf]
  4. Tadahiro Kuroda
    Low-Power, High-Speed CMOS VLSI Design. [Citation Graph (0, 0)][DBLP]
    ICCD, 2002, pp:310-315 [Conf]
  5. Yuichi Hori, Kenji Shimizu, Yutaka Nakamura, Tadahiro Kuroda
    A Real-Time Multi Face Detection Technique Using Positive-Negative Lines-of-Face Template. [Citation Graph (0, 0)][DBLP]
    ICPR (1), 2004, pp:765-768 [Conf]
  6. Takahide Terada, Shingo Yoshizumi, Yukitoshi Sanada, Tadahiro Kuroda
    Transceiver circuits for pulse-based ultra-wideband. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:349-352 [Conf]
  7. Fuyuki Ichiba, Kojiro Suzuki, Shinji Mita, Tadahiro Kuroda, Tohru Furuyama
    Variable supply-voltage scheme with 95%-efficiency DC-DC converter for MPEG-4 codec. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1999, pp:54-59 [Conf]
  8. Tadahiro Kuroda, Tetsuya Fujita, Shinji Mita, Toshiaki Mori, Kenji Matsuo, Masakazu Kakumu, Takayasu Sakurai
    Substrate noise influence on circuit performance in variable threshold-voltage scheme. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1996, pp:309-312 [Conf]
  9. Amit Kumar 0002, Noriyuki Miura, Muhammad Muqsith, Tadahiro Kuroda
    Active Crosstalk Cancel for High-Density Inductive Inter-chip Wireless Communication. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2006, pp:271-276 [Conf]

  10. A wireless real-time on-chip bus trace system. [Citation Graph (, )][DBLP]


  11. A 1 GHz CMOS comparator with dynamic offset control technique. [Citation Graph (, )][DBLP]


  12. A 1Tb/s 3W Inductive-Coupling Transceiver Chip. [Citation Graph (, )][DBLP]


  13. MuCCRA-Cube: A 3D dynamically reconfigurable processor with inductive-coupling link. [Citation Graph (, )][DBLP]


  14. Face detection through compact classifier using Adaptive Look-Up-Table. [Citation Graph (, )][DBLP]


  15. Speaker Siglet Detection for Business Microscope. [Citation Graph (, )][DBLP]


  16. Speech "Siglet" Detection for Business Microscope (concise contribution). [Citation Graph (, )][DBLP]


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