The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Shinobu Nagayama: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Shinobu Nagayama, Tsutomu Sasao
    Minimization of memory size for heterogeneous MDDs. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2004, pp:871-874 [Conf]
  2. Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
    Programmable numerical function generators based on quadratic approximation: architecture and synthesis method. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2006, pp:378-383 [Conf]
  3. Tsutomu Sasao, Shinobu Nagayama, Jon T. Butler
    Programmable Numerical Function Generators: Architectures and Synthesis Method. [Citation Graph (0, 0)][DBLP]
    FPL, 2005, pp:118-123 [Conf]
  4. Shinobu Nagayama, Tsutomu Sasao
    Compact Representations of Logic Functions using Heterogeneous MDDs. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2003, pp:247-252 [Conf]
  5. Shinobu Nagayama, Tsutomu Sasao
    On the Minimization of Average Path Lengths for Heterogeneous MDDs. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2004, pp:216-222 [Conf]
  6. Shinobu Nagayama, Tsutomu Sasao, Yukihiro Iguchi, Munehiro Matsuura
    Representations of Logic Functions Using QRMDDs. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2002, pp:261-0 [Conf]
  7. Tsutomu Sasao, Shinobu Nagayama
    Representations of Elementary Functions Using Binary Moment Diagrams. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2006, pp:28- [Conf]
  8. Tsutomu Sasao, Shinobu Nagayama, Jon T. Butler
    Numerical Function Generators Using LUT Cascades. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2007, v:56, n:6, pp:826-838 [Journal]
  9. Shinobu Nagayama, Tsutomu Sasao
    On the optimization of heterogeneous MDDs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:11, pp:1645-1659 [Journal]

  10. Numerical Function Generators Using Edge-Valued Binary Decision Diagrams. [Citation Graph (, )][DBLP]


  11. Design Method for Numerical Function Generators Based on Polynomial Approximation for FPGA Implementation. [Citation Graph (, )][DBLP]


  12. Programmable Numerical Function Generators for Two-Variable Functions. [Citation Graph (, )][DBLP]


  13. A Systolic String Matching Algorithm for High-Speed Recognition of a Restricted Regular Set. [Citation Graph (, )][DBLP]


  14. Numerical function generators using bilinear interpolation. [Citation Graph (, )][DBLP]


  15. Representations of Two-Variable Elementary Functions Using EVMDDs and their Applications to Function Generators. [Citation Graph (, )][DBLP]


  16. Representations of Elementary Functions Using Edge-Valued MDDs. [Citation Graph (, )][DBLP]


  17. Floating-Point Numerical Function Generators Using EVMDDs for Monotone Elementary Functions. [Citation Graph (, )][DBLP]


  18. Floating-Point Numeric Function Generators Based on Piecewise-Split EVMDDs. [Citation Graph (, )][DBLP]


  19. A Parallel Multistage Metaheuristic Algorithm for VLSI Floorplanning. [Citation Graph (, )][DBLP]


  20. A Proposal of RM QRM-MLD with Independent Adaptive Control of Surviving Symbol Replica Candidates for MIMO-OFDM System. [Citation Graph (, )][DBLP]


  21. A Proposal of QRM-MLD for Reduced Complexity of MLD to Detect MIMO Signals in Fading Environment. [Citation Graph (, )][DBLP]


Search in 0.002secs, Finished in 0.004secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002