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Publications of Author

1. Costas Argyrides, Dhiraj K. Pradhan
   Highly Reliable Power Aware Memory Design. [Citation Graph (0, 0)][DBLP]
   IOLTS, 2007, pp:189-190 [Conf]
   
2. Hamid R. Zarandi, Seyed Ghassem Miremadi, Costas Argyrides, Dhiraj K. Pradhan
   Fast SEU Detection and Correction in LUT Configuration Bits of SRAM-based FPGAs. [Citation Graph (0, 0)][DBLP]
   IPDPS, 2007, pp:1-6 [Conf]
   
3. Costas Argyrides, Hamid R. Zarandi, Dhiraj K. Pradhan
   Multiple Upsets Tolerance in SRAM Memory. [Citation Graph (0, 0)][DBLP]
   ISCAS, 2007, pp:365-368 [Conf]
   
4. Hamid R. Zarandi, Seyed Ghassem Miremadi, Costas Argyrides, Dhiraj K. Pradhan
   CLB-based Detection and Correction of Bit-flip faults in SRAM-based FPGAs. [Citation Graph (0, 0)][DBLP]
   ISCAS, 2007, pp:3696-3699 [Conf]
   
5. 
   Matrix Codes: Multiple Bit Upsets Tolerant Method for SRAM Memories. [Citation Graph (, )][DBLP]
   
   
6. 
   Embedding Current Monitoring in H-Tree RAM Architecture for Multiple SEU Tolerance and Reliability Improvement. [Citation Graph (, )][DBLP]
   
   
7. 
   A fast error correction technique for matrix multiplication algorithms. [Citation Graph (, )][DBLP]
   
   
8. 
   Increasing memory yield in future technologies through innovative design. [Citation Graph (, )][DBLP]
   
   
9. 
   Area Reliability Trade-Off in Improved Reed Muller Coding. [Citation Graph (, )][DBLP]
   
   
10. 
    A soft error robust and power aware memory design. [Citation Graph (, )][DBLP]
    
    
11. 
    Reliability aware yield improvement technique for nanotechnology based circuits. [Citation Graph (, )][DBLP]
    
    
12. 
    Single Error Correcting Finite Field Multipliers Over GF(2m). [Citation Graph (, )][DBLP]
    
    
13. 
    Algorithm Level Fault Tolerance: A Technique to Cope with Long Duration Transient Faults in Matrix Multiplication Algorithms. [Citation Graph (, )][DBLP]