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Zhenyu Qi:
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- Zhenyu Qi, Sheldon X.-D. Tan, Hao Yu, Lei He
Wideband modeling of RF/Analog circuits via hierarchical multi-point model order reduction. [Citation Graph (0, 0)][DBLP] ASP-DAC, 2005, pp:224-229 [Conf]
- Hao Yu, Lei He, Zhenyu Qi, Sheldon X.-D. Tan
A wideband hierarchical circuit reduction for massively coupled interconnects. [Citation Graph (0, 0)][DBLP] ASP-DAC, 2005, pp:111-114 [Conf]
- Hang Li, Zhenyu Qi, Sheldon X.-D. Tan, Lifeng Wu, Yici Cai, Xianlong Hong
Partitioning-based approach to fast on-chip decap budgeting and minimization. [Citation Graph (0, 0)][DBLP] DAC, 2005, pp:170-175 [Conf]
- Sheldon X.-D. Tan, Weikun Guo, Zhenyu Qi
Hierarchical approach to exact symbolic analysis of large analog circuits. [Citation Graph (0, 0)][DBLP] DAC, 2004, pp:860-863 [Conf]
- Sheldon X.-D. Tan, Zhenyu Qi, Hang Li
Hierarchical Modeling and Simulation of Large Analog Circuits. [Citation Graph (0, 0)][DBLP] DATE, 2004, pp:740-741 [Conf]
- Matthew M. Ziegler, Gary S. Ditlow, Stephen V. Kosonocky, Zhenyu (Jerry) Qi, Mircea R. Stan
Structured and tuned array generation (STAG) for high-performance random logic. [Citation Graph (0, 0)][DBLP] ACM Great Lakes Symposium on VLSI, 2007, pp:257-262 [Conf]
- Pu Liu, Zhenyu Qi, Hang Li, Lingling Jin, Wei Wu, Sheldon X.-D. Tan, Jun Yang
Fast thermal simulation for architecture level dynamic thermal management. [Citation Graph (0, 0)][DBLP] ICCAD, 2005, pp:639-644 [Conf]
- Pu Liu, Sheldon X.-D. Tan, Hang Li, Zhenyu Qi, Jun Kong, Bruce McGaughy, Lei He
An efficient method for terminal reduction of interconnect circuits considering delay variations. [Citation Graph (0, 0)][DBLP] ICCAD, 2005, pp:821-826 [Conf]
- Hang Li, Pu Liu, Zhenyu Qi, Lingling Jin, Wei Wu, Sheldon X.-D. Tan, Jun Yang
Efficient Thermal Simulation for Run-Time Temperature Tracking and Management. [Citation Graph (0, 0)][DBLP] ICCD, 2005, pp:130-136 [Conf]
- Pu Liu, Zhenyu Qi, Sheldon X.-D. Tan
Passive Hierarchical Model Order Reduction and Realization of RLCM Circuits. [Citation Graph (0, 0)][DBLP] ISQED, 2005, pp:603-608 [Conf]
- Zhenyu Qi, Hang Li, Sheldon X.-D. Tan, Lifeng Wu, Yici Cai, Xianlong Hong
Fast Decap Allocation Algorithm For Robust On-Chip Power Delivery. [Citation Graph (0, 0)][DBLP] ISQED, 2005, pp:542-547 [Conf]
- Zhenyu (Jerry) Qi, Matthew M. Ziegler, Stephen V. Kosonocky, Jan M. Rabaey, Mircea R. Stan
Multi-Dimensional Circuit and Micro-Architecture Level Optimization. [Citation Graph (0, 0)][DBLP] ISQED, 2007, pp:275-280 [Conf]
- Hang Li, Jeffrey Fan, Zhenyu Qi, Sheldon X.-D. Tan, Lifeng Wu, Yici Cai, Xianlong Hong
Partitioning-Based Approach to Fast On-Chip Decoupling Capacitor Budgeting and Minimization. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:11, pp:2402-2412 [Journal]
- Zhenyu Qi, Hao Yu, Pu Liu, Sheldon X.-D. Tan, Lei He
Wideband passive multiport model order reduction and realization of RLCM circuits. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:8, pp:1496-1509 [Journal]
- Sheldon X.-D. Tan, Weikun Guo, Zhenyu Qi
Hierarchical approach to exact symbolic analysis of large analog circuits. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:8, pp:1241-1250 [Journal]
SRAM-based NBTI/PBTI sensor system design. [Citation Graph (, )][DBLP]
Stacking SRAM banks for ultra low power standby mode operation. [Citation Graph (, )][DBLP]
NBTI resilient circuits using adaptive body biasing. [Citation Graph (, )][DBLP]
Small embeddable NBTI sensors (SENS) for tracking on-chip performance decay. [Citation Graph (, )][DBLP]
Automatic Performance Evaluation Of Palm Recognition. [Citation Graph (, )][DBLP]
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