The SCEAS System
Navigation Menu

Search the dblp DataBase


Takashi Nojima: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Takashi Nojima, Xiaoke Zhu, Yasuhiro Takashima, Shigetoshi Nakatake, Yoji Kajitani
    Multi-level placement with circuit schema based clustering in analog IC layouts. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2004, pp:406-411 [Conf]
  2. Takashi Nojima, Yasuhiro Takashima, Shigetoshi Nakatake, Yoji Kajitani
    A device-level placement with multi-directional convex clustering. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2004, pp:196-201 [Conf]
  3. Takashi Nojima, Nobuto Ono, Shigetoshi Nakatake, Toru Fujimura, Koji Okazaki, Yoji Kajitani
    Adaptive Porting of Analog IPs with Reusable Conservative Properties. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2006, pp:18-23 [Conf]
  4. Tan Yan, Shigetoshi Nakatake, Takashi Nojima
    Formulating the Empirical Strategies in Module Generation of Analog MOS Layout. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2006, pp:44-49 [Conf]

Search in 0.001secs, Finished in 0.002secs
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
System created by [] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002