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Koichi Nose: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Koichi Nose, Takayasu Sakurai
    Optimization of VDD and VTH for low-power and high speed applications. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2000, pp:469-474 [Conf]
  2. Koichi Nose, Takayasu Sakurai
    Integrated Current Sensing Device for Micro IDDQ Test. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1998, pp:323-326 [Conf]
  3. Masayuki Hirabayashi, Koichi Nose, Takayasu Sakurai
    Design methodology and optimization strategy for dual-VTH scheme using commercially available tools. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2001, pp:283-286 [Conf]
  4. Koichi Nose, Soo-Ik Chae, Takayasu Sakurai
    Voltage dependent gate capacitance and its impact in estimating power and delay of CMOS digital circuits with low supply voltage (poster session). [Citation Graph (0, 0)][DBLP]
    ISLPED, 2000, pp:228-230 [Conf]
  5. Koichi Nose, Takayasu Sakurai
    Power-conscious interconnect buffer optimization with improved modeling of driver MOSFET and Its implications to bulk and SOI CMOS technology. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2002, pp:24-29 [Conf]
  6. Koichi Nose, Takayasu Sakurai
    Analysis and future trend of short-circuit power. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:9, pp:1023-1030 [Journal]

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