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Frank M. Johannes: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Bernd Obermeier, Frank M. Johannes
    Temperature-aware global placement. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2004, pp:143-148 [Conf]
  2. Hans Eisenmann, Frank M. Johannes
    Generic Global Placement and Floorplanning. [Citation Graph (0, 0)][DBLP]
    DAC, 1998, pp:269-274 [Conf]
  3. Frank M. Johannes
    Partitioning of VLSI Circuits and Systems. [Citation Graph (0, 0)][DBLP]
    DAC, 1996, pp:83-87 [Conf]
  4. Knut M. Just, Jürgen M. Kleinhans, Frank M. Johannes
    On the relative placement and the transportation problem for standard-cell layout. [Citation Graph (0, 0)][DBLP]
    DAC, 1986, pp:308-313 [Conf]
  5. Bernd Obermeier, Frank M. Johannes
    Quadratic placement using an improved timing model. [Citation Graph (0, 0)][DBLP]
    DAC, 2004, pp:705-710 [Conf]
  6. Bernhard M. Riess, Konrad Doll, Frank M. Johannes
    Partitioning Very Large Circuits Using Analytical Placement Techniques. [Citation Graph (0, 0)][DBLP]
    DAC, 1994, pp:646-651 [Conf]
  7. Georg Sigl, Konrad Doll, Frank M. Johannes
    Analytical Placement: A Linear or a Quadratic Objective Function? [Citation Graph (0, 0)][DBLP]
    DAC, 1991, pp:427-432 [Conf]
  8. Aiguo Lu, Guenter Stenz, Frank M. Johannes
    Technology Mapping for Minimizing Gate and Routing Area. [Citation Graph (0, 0)][DBLP]
    DATE, 1998, pp:664-669 [Conf]
  9. Ulrich Seidl, Klaus Eckl, Frank M. Johannes
    Performance-Directed Retiming for FPGAs Using Post-Placement Delay Information. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10770-10777 [Conf]
  10. Henning Spruth, Frank M. Johannes
    Architectures for Parallel Slicing Enumeration in VLSI Layout. [Citation Graph (0, 0)][DBLP]
    Parallel Computer Architectures, 1993, pp:219-233 [Conf]
  11. Konrad Doll, Frank M. Johannes, Georg Sigl
    Accurate net models for placement improvement by network flow methods. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1992, pp:594-597 [Conf]
  12. Peter Spindler, Frank M. Johannes
    Fast and robust quadratic placement combined with an exact linear net model. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2006, pp:179-186 [Conf]
  13. Henning Spruth, Frank M. Johannes
    Parallel Routing of VLSI Circuits Based on Net Independency. [Citation Graph (0, 0)][DBLP]
    IPPS, 1994, pp:949-953 [Conf]
  14. Henning Spruth, Frank M. Johannes, Kurt Antreich
    PHIroute: A Parallel Hierarchical Sea-of-Gates Router. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1994, pp:487-490 [Conf]
  15. Guenter Stenz, Bernhard M. Riess, Bernhard Rohfleisch, Frank M. Johannes
    Timing driven placement in interaction with netlist transformations. [Citation Graph (0, 0)][DBLP]
    ISPD, 1997, pp:36-41 [Conf]
  16. Bernd Obermeier, Hans Ranke, Frank M. Johannes
    Kraftwerk: a versatile placement approach. [Citation Graph (0, 0)][DBLP]
    ISPD, 2005, pp:242-244 [Conf]
  17. Konrad Doll, Frank M. Johannes, Georg Sigl
    DOMINO: Deterministic Placement Improvement with Hill-Climbing Capabilities. [Citation Graph (0, 0)][DBLP]
    VLSI, 1991, pp:91-100 [Conf]
  18. Karl-Heinz Erhard, Frank M. Johannes
    Area Minimisation of IC Power/Ground Nets by Topology Optimisation. [Citation Graph (0, 0)][DBLP]
    VLSI, 1991, pp:119-126 [Conf]
  19. Konrad Doll, Frank M. Johannes, Kurt Antreich
    Iterative placement improvement by network flow methods. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:10, pp:1189-1200 [Journal]
  20. Jürgen M. Kleinhans, Georg Sigl, Frank M. Johannes, Kurt Antreich
    GORDIAN: VLSI placement by quadratic programming and slicing optimization. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1991, v:10, n:3, pp:356-365 [Journal]
  21. Guenter Stenz, Bernhard M. Riess, Bernhard Rohfleisch, Frank M. Johannes
    Performance optimization by interacting netlist transformations andplacement. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:3, pp:350-358 [Journal]
  22. Peter Spindler, Frank M. Johannes
    Fast and accurate routing demand estimation for efficient routability-driven placement. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:1226-1231 [Conf]

  23. Deterministic analog circuit placement using hierarchically bounded enumeration and enhanced shape functions. [Citation Graph (, )][DBLP]


  24. Abacus: fast legalization of standard cell circuits with minimal movement. [Citation Graph (, )][DBLP]


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