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Sreekumar V. Kodakara: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Anand Ramalingam, Sreekumar V. Kodakara, Anirudh Devgan, David Z. Pan
    Robust analytical gate delay modeling for low voltage circuits. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2006, pp:61-66 [Conf]
  2. Jinpyo Kim, Sreekumar V. Kodakara, Wei-Chung Hsu, David J. Lilja, Pen-Chung Yew
    Dynamic Code Region (DCR) Based Program Phase Tracking and Prediction for Dynamic Optimizations. [Citation Graph (0, 0)][DBLP]
    HiPEAC, 2005, pp:203-217 [Conf]
  3. Joshua J. Yi, Sreekumar V. Kodakara, Resit Sendag, David J. Lilja, Douglas M. Hawkins
    Characterizing and Comparing Prevailing Simulation Techniques. [Citation Graph (0, 0)][DBLP]
    HPCA, 2005, pp:266-277 [Conf]
  4. Sreekumar V. Kodakara, Deepak Mathaikutty, Ajit Dingankar, Sandeep K. Shukla, David J. Lilja
    Model Based Test Generation for Microprocessor Architecture Validation. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2007, pp:465-472 [Conf]
  5. Deepak Mathaikutty, Sandeep K. Shukla, Sreekumar V. Kodakara, David J. Lilja, Ajit Dingankar
    Design fault directed test generation for microprocessor validation. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:761-766 [Conf]

  6. CIM: A Reliable Metric for Evaluating Program Phase Classifications. [Citation Graph (, )][DBLP]


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