The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Emil Talpes: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Venkata Syam P. Rapaka, Emil Talpes, Diana Marculescu
    Mixed-clock issue queue design for energy aware, high-performance cores. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2004, pp:380-383 [Conf]
  2. Diana Marculescu, Emil Talpes
    Variability and energy awareness: a microarchitecture-level perspective. [Citation Graph (0, 0)][DBLP]
    DAC, 2005, pp:11-16 [Conf]
  3. Emil Talpes, Diana Marculescu
    Increased Scalability and Power Efficiency by Using Multiple Speed Pipelines. [Citation Graph (0, 0)][DBLP]
    ISCA, 2005, pp:310-321 [Conf]
  4. Emil Talpes, Diana Marculescu
    Power reduction through work reuse. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2001, pp:340-345 [Conf]
  5. Emil Talpes, Diana Marculescu
    A critical analysis of application-adaptive multiple clock processors. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2003, pp:278-281 [Conf]
  6. Emil Talpes, Diana Marculescu
    Impact of technology scaling on energy aware execution cache-based microarchitectures. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2004, pp:50-53 [Conf]
  7. Diana Marculescu, Emil Talpes
    Energy Awareness and Uncertainty in Microarchitecture-Level Design. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2005, v:25, n:5, pp:64-76 [Journal]
  8. Emil Talpes, Diana Marculescu
    Execution cache-based microarchitecture for power-efficient superscalar processors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2005, v:13, n:1, pp:14-26 [Journal]
  9. Emil Talpes, Diana Marculescu
    Toward a multiple clock/voltage island design style for power-aware processors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2005, v:13, n:5, pp:591-603 [Journal]

Search in 0.009secs, Finished in 0.010secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002