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Du Chen:
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- Du Chen, Yuan Li, Dongming Xu, John G. Harris, José Carlos Príncipe
Asynchronous biphasic pulse signal coding and its CMOS realization. [Citation Graph (0, 0)][DBLP] ISCAS, 2006, pp:- [Conf]
A Performance Model for Run-Time Reconfigurable Hardware Accelerator. [Citation Graph (, )][DBLP]
A fast algorithm for energy-aware mapping of cores onto WK-recursive NoC under performance constraints. [Citation Graph (, )][DBLP]
Pulse-based signal compression for implanted neural recording systems. [Citation Graph (, )][DBLP]
CMP Thread Assignment Based on Group Sharing L2 Cache. [Citation Graph (, )][DBLP]
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