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Publications of Author

1. Shih-Hao Ou, Tay-Jyi Lin, Chao-Wei Huang, Yu-Ting Kuo, Chie-Min Chao, Chih-Wei Liu, Chein-Wei Jen
   A 52mW 1200MIPS compact DSP for multi-core media SoC. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2006, pp:118-119 [Conf]
   
2. Tay-Jyi Lin, Chie-Min Chao, Chia-Hsien Liu, Pi-Chen Hsiao, Shin-Kai Chen, Li-Chun Lin, Chih-Wei Liu, Chein-Wei Jen
   A unified processor architecture for RISC & VLIW DSP. [Citation Graph (0, 0)][DBLP]
   ACM Great Lakes Symposium on VLSI, 2005, pp:50-55 [Conf]
   
3. Tay-Jyi Lin, Hung-Yueh Lin, Chie-Min Chao, Chih-Wei Liu, Chein-Wei Jen
   A compact DSP core with static floating-point unit & its microcode generation. [Citation Graph (0, 0)][DBLP]
   ACM Great Lakes Symposium on VLSI, 2004, pp:57-60 [Conf]
   
4. Hung-Yueh Lin, Tay-Jyi Lin, Chie-Min Chao, Yen-Chin Liao, Chih-Wei Liu, Chein-Wei Jen
   Static floating-point unit with implicit exponent tracking for embedded DSP. [Citation Graph (0, 0)][DBLP]
   ISCAS (2), 2004, pp:821-824 [Conf]
   
5. Tay-Jyi Lin, Hung-Yueh Lin, Chie-Min Chao, Chih-Wei Liu, Chih-Wei Jen
   A Compact DSP Core with Static Floating-Point Arithmetic. [Citation Graph (0, 0)][DBLP]
   VLSI Signal Processing, 2006, v:42, n:2, pp:127-138 [Journal]
   
6. 
   Hierarchical instruction encoding for VLIW digital signal processors. [Citation Graph (, )][DBLP]