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Publications of Author

1. Subir K. Roy, Hiroaki Iwashita, Tsuneo Nakata
   Formal verification based on assume and guarantee approach - a case study (short paper). [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2000, pp:77-80 [Conf]
   
2. Subir K. Roy, S. Ramesh, Supratik Chakraborty, Tsuneo Nakata, Sreeranga P. Rajan
   Functional Verification of System on Chips-Practices, Issues and Challenges. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2002, pp:11-13 [Conf]
   
3. Pradip K. Kar, Subir K. Roy
   TECHMIG: A Layout Tool for Technology Migration. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 1999, pp:615-620 [Conf]
   
4. Bupesh Pandita, Subir K. Roy
   Design and Implementation of Viterbi Decoder Using FPGAs. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 1999, pp:611-0 [Conf]
   
5. Subir K. Roy, Hiroaki Iwashita, Tsuneo Nakata
   Dataflow Analysis for Resource Contention and Register Leakage Properties. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 2000, pp:418-423 [Conf]
   
6. Subir K. Roy, S. Ramesh, Supratik Chakraborty, Tsuneo Nakata, Sreeranga P. Rajan
   Functional Verification of System on Chips-Practices, Issues and Challenges (Tutorial Abstract). [Citation Graph (0, 0)][DBLP]
   VLSI Design, 2002, pp:11-13 [Conf]
   
7. Subir K. Roy, Rubin A. Parekhji
   Modeling Techniques for Formal Verification of BIST Controllers and Their Integration into SOC Designs. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 2007, pp:364-372 [Conf]
   
8. 
   Top Level SOC Interconnectivity Verification Using Formal Techniques. [Citation Graph (, )][DBLP]