The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Jin-Fa Lin: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jin-Fa Lin, Yin-Tsung Hwang, Ming-Hwa Sheu, Cheng-Che Ho
    A high speed and energy efficient full adder design using complementary & level restoring carry logic. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]

  2. Low Power Multiplier Designs Based on Improved Column Bypassing Schemes. [Citation Graph (, )][DBLP]


  3. Low Power Multipliers Using Enhenced Row Bypassing Schemes. [Citation Graph (, )][DBLP]


Search in 0.001secs, Finished in 0.002secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002