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Po-Tsang Huang:
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- Po-Tsang Huang, Wei Hwang
2-level FIFO architecture design for switch fabrics in network-on-chip. [Citation Graph (0, 0)][DBLP] ISCAS, 2006, pp:- [Conf]
A decision support system of statistical process control for printed circuit boards manufacturing. [Citation Graph (, )][DBLP]
A 5.2mW all-digital fast-lock self-calibrated multiphase delay-locked loop. [Citation Graph (, )][DBLP]
"Green" micro-architecture and circuit co-design for ternary content addressable memory. [Citation Graph (, )][DBLP]
Low Power and Reliable Interconnection with Self-Corrected Green Coding Scheme for Network-on-Chip. [Citation Graph (, )][DBLP]
Low Power Pre-Comparison Scheme for NOR-Type 10T Content Addressable Memory. [Citation Graph (, )][DBLP]
On-Chip DC-DC Converter with Frequency Detector for Dynamic Voltage Scaling Technology. [Citation Graph (, )][DBLP]
A robust ultra-low power asynchronous FIFO memory with self-adaptive power control. [Citation Graph (, )][DBLP]
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