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Publications of Author

1. Stefan Rusu, Manoj Sachdev, Christer Svensson, B. Nauta
   T3: Trends and Challenges in VLSI Technology Scaling towards 100nm. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2002, pp:16-17 [Conf]
   
2. Christer Svensson
   Synchronous Latency Insensitive Design. [Citation Graph (0, 0)][DBLP]
   ASYNC, 2004, pp:3- [Conf]
   
3. Anders Edman, Christer Svensson
   Timing closure through a globally synchronous, timing partitioned design methodology. [Citation Graph (0, 0)][DBLP]
   DAC, 2004, pp:71-74 [Conf]
   
4. A. Dell'Acqua, M. Hansen, S. Inkinen, B. Lofstedt, J. P. Vanuxem, Christer Svensson, Jiren Yuan, H. Hentzell, L. Del Buono, J. David, J. F. Genat, H. Lebbolo, O. LeDortz, P. Nayman, A. Savoy-Navarro, R. Zitoun, Cesare Alippi, Luca Breveglieri, Luigi Dadda, Vincenzo Piuri, Fabio Salice, Mariagiovanna Sami, Renato Stefanelli, P. Cattaneo, G. Fumagalli, G. Goggi, S. Brigati, Umberto Gatti, Franco Maloberti, Guido Torelli, P. Carlson, A. Kerek, Goran Appelquist, S. Berglund, C. Bohm, Magnus Engström, N. Yamdagni, Rolf Sundblad, I. Höglund, S. T. Persson
   System Level Policies for Fault Tolerance Issues in the FERMI Project. [Citation Graph (0, 0)][DBLP]
   DFT, 1993, pp:1-8 [Conf]
   
5. Fenghao Mu, Christer Svensson
   Efficient High-Speed CMOS Design by Layout Based Schematic Method. [Citation Graph (0, 0)][DBLP]
   EUROMICRO, 1998, pp:10337-10340 [Conf]
   
6. Fenghao Mu, Christer Svensson
   Self-Synchronized Vector Transfer for High Speed Parallel Systems. [Citation Graph (0, 0)][DBLP]
   ICPADS, 1998, pp:2-9 [Conf]
   
7. Darius Jakonis, Christer Svensson
   A 1.6 GHz downconversion sampling mixer in CMOS. [Citation Graph (0, 0)][DBLP]
   ISCAS (1), 2003, pp:725-728 [Conf]
   
8. Christer Jansson, Christer Svensson
   A sensor array for phase and amplitude detection of synchronous modulated light sources. [Citation Graph (0, 0)][DBLP]
   ISCAS, 1993, pp:164-167 [Conf]
   
9. Jacob Midtgaard, Christer Svensson
   5.8Gb/s 16: 1 Multiplexer and 1: 16 Demultiplexer Using 1.2µm BiCMOS. [Citation Graph (0, 0)][DBLP]
   ISCAS, 1994, pp:43-46 [Conf]
   
10. Håkan Bengtson, Christer Svensson
    3V CMOS 0.35 µ transimpedance receiver for optical applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2001, pp:69-71 [Conf]
    
11. Fenghao Mu, Christer Svensson
    High speed interface for system-on-chip design by self-tested self-synchronization. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:516-519 [Conf]
    
12. Fenghao Mu, Christer Svensson
    High speed multistage CMOS clock buffers with pulse width control loop. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:541-544 [Conf]
    
13. Fenghao Mu, Christer Svensson
    Methodology of layout based schematic and its usage in efficient high performance CMOS design. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:254-257 [Conf]
    
14. Behzad Mesgarzadeh, Christer Svensson, Atila Alvandpour
    A new mesochronous clocking scheme for synchronization in SoC. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2004, pp:605-608 [Conf]
    
15. Darius Jakonis, Christer Svensson
    A 1 GHz linearized CMOS track-and-hold circuit. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2002, pp:577-580 [Conf]
    
16. Atila Alvandpour, Per Larsson-Edefors, Christer Svensson
    Separation and extraction of short-circuit power consumption in digital CMOS VLSI circuits. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1998, pp:245-249 [Conf]
    
17. Mattias Duppils, Christer Svensson
    Low power mixed analog-digital signal processing. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2000, pp:61-66 [Conf]
    
18. Christer Svensson, Atila Alvandpour
    Low power and low voltage CMOS digital circuit techniques. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1998, pp:7-10 [Conf]
    
19. Peter Caputa, Henrik Fredriksson, Martin Hansson, Stefan Andersson, Atila Alvandpour, Christer Svensson
    An Extended Transition Energy Cost Model for Buses in Deep Submicron Technologies. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2004, pp:849-858 [Conf]
    
20. Christer Svensson, Jiren Yuan
    Ultra high speed CMOS design. [Citation Graph (0, 0)][DBLP]
    VLSI, 1993, pp:273-282 [Conf]
    
21. Peter Caputa, Christer Svensson
    A 3Gb/s/wire Global On-Chip Bus with Near Velocity-of-Light Latency. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2006, pp:117-122 [Conf]
    
22. Stefan Rusu, Manoj Sachdev, Christer Svensson, B. Nauta
    Trends and Challenges in VLSI Technology Scaling towards 100nm (Tutorial Abstract). [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2002, pp:16-17 [Conf]
    
23. Håkan Bengtson, Christer Svensson
    2 GB/S decision feedback equalizer in 3.3 V 0.35 µM CMOS. [Citation Graph (0, 0)][DBLP]
    Circuits, Signals, and Systems, 2004, pp:114-119 [Conf]
    
24. Morteza Afghahi, Christer Svensson
    Performance of Synchronous and Asynchronous Schemes for VLSI Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1992, v:41, n:7, pp:858-872 [Journal]
    
25. Rolf Sundblad, Christer Svensson
    Fully Dynamic Switch-Level Simulation of CMOS Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1987, v:6, n:2, pp:282-289 [Journal]
    
26. Christer Svensson, Robert Tjarnstrom
    Switch-level simulation and the pass transistor EXOR gate. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:9, pp:994-997 [Journal]
    
27. Fenghao Mu, Christer Svensson
    Vector Transfer by Self-Tested Self-Synchronization for Parallel Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1999, v:10, n:8, pp:769-780 [Journal]
    
28. 
    Single-Chip High-Speed Computation of Optical Flow. [Citation Graph (, )][DBLP]