Search the dblp DataBase
Hoi-Jun Yoo :
[Publications ]
[Author Rank by year ]
[Co-authors ]
[Prefers ]
[Cites ]
[Cited by ]
Publications of Author
Yong-Ha Park , Seon-Ho Han , Hoi-Jun Yoo Single chip 3D rendering engine integrating embedded DRAM frame buffer and Hierarchical Octet Tree (HOT) array processor with bandwidth amplification. [Citation Graph (0, 0)][DBLP ] ASP-DAC, 2001, pp:9-10 [Conf ] Yong-Ha Park , Hoi-Jun Yoo , Jeonghoon Kook Embedded DRAM (eDRAM) Power-Energy Estimation for System-on-a-chip (SoC) Applications. [Citation Graph (0, 0)][DBLP ] ASP-DAC, 2002, pp:625-630 [Conf ] Ramchan Woo , Sungdae Choi , Ju-Ho Sohn , Seong-Jun Song , Young-Don Bae , Hoi-Jun Yoo A low-power graphics LSI integrating 29Mb embedded DRAM for mobile multimedia applications. [Citation Graph (0, 0)][DBLP ] ASP-DAC, 2004, pp:533-534 [Conf ] Se-Joong Lee , Kwanho Kim , Hyejung Kim , Namjun Cho , Hoi-Jun Yoo A network-on-chip with 3Gbps/wire serialized on-chip interconnect using adaptive control schemes. [Citation Graph (0, 0)][DBLP ] DATE, 2006, pp:79-80 [Conf ] Ju-Ho Sohn , Jeong-Ho Woo , Jerald Yoo , Hoi-Jun Yoo Design and test of fixed-point multimedia co-processor for mobile applications. [Citation Graph (0, 0)][DBLP ] DATE Designers' Forum, 2006, pp:249-253 [Conf ] Kangmin Lee , Se-Joong Lee , Hoi-Jun Yoo SILENT: serialized low energy transmission coding for on-chip interconnection networks. [Citation Graph (0, 0)][DBLP ] ICCAD, 2004, pp:448-451 [Conf ] Narrijun Cho , Seong-Jun Song , Jae-Youl Lee , Sunyoung Kim , Shiho Kim , Hoi-Jun Yoo A 8-µW, 0.3-mm2 RF-powered transponder with temperature sensor for wireless environmental monitoring. [Citation Graph (0, 0)][DBLP ] ISCAS (5), 2005, pp:4763-4766 [Conf ] Kwanho Kim , Se-Joong Lee , Kangmin Lee , Hoi-Jun Yoo An arbitration look-ahead scheme for reducing end-to-end latency in networks on chip. [Citation Graph (0, 0)][DBLP ] ISCAS (3), 2005, pp:2357-2360 [Conf ] Donghyun Kim , Kangmin Lee , Se-Joong Lee , Hoi-Jun Yoo A reconfigurable crossbar switch with adaptive bandwidth control for networks-on-chip. [Citation Graph (0, 0)][DBLP ] ISCAS (3), 2005, pp:2369-2372 [Conf ] Sunyoung Kim , Jae-Youl Lee , Seong-Jun Song , Namjun Cho , Hoi-Jun Yoo A 0.9-V 67-µW analog front-end using adaptive-SNR technique for digital hearing aid. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2005, pp:740-743 [Conf ] Sung-Eun Kim , Seong-Jun Song , Sung Min Park , Hoi-Jun Yoo CMOS optical receiver chipset for gigabit Ethernet applications. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2003, pp:29-32 [Conf ] Hoi-Jun Yoo , Seung-Jun Lee , Jeong-Tae Kwon , Wi-Sik Min , Kye-Hwan Oh A Precision CMOS Voltage Reference with Enhanced Stability for the Application to Advance VLSIs. [Citation Graph (0, 0)][DBLP ] ISCAS, 1993, pp:1318-1321 [Conf ] Min-wuk Lee , Byeong-Gyu Nam , Ju-Ho Sohn , Namjun Cho , Hyejung Kim , Kwanho Kim , Hoi-Jun Yoo A fixed-point 3D graphics library with energy-efficient cache architecture for mobile multimedia systems. [Citation Graph (0, 0)][DBLP ] ISCAS (5), 2005, pp:4602-4605 [Conf ] Kangmin Lee , Chi Weon Yoon , Ramchan Woo , Jeong-Hun Kook , Ja-Il Koo , Tae-Sung Jung , Hoi-Jun Yoo A comparative performance analysis of a DDR-SDRAM, a D-RDRAM, and a DDR-FCRAM using a POPeye simulator. [Citation Graph (0, 0)][DBLP ] ISCAS (5), 2001, pp:81-84 [Conf ] Jaeseo Lee , Jae-Won Lim , Sung-Jun Song , Sung-Sik Song , Wang-joo Lee , Hoi-Jun Yoo Design and implementation of CMOS LVDS 2.5 Gb/s transmitter and 1.3 Gb/s receiver for optical interconnections. [Citation Graph (0, 0)][DBLP ] ISCAS (4), 2001, pp:702-705 [Conf ] Ju-Ho Sohn , Ramchan Woo , Hoi-Jun Yoo Optimization of portable system architecture for real-time 3D graphics. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:769-772 [Conf ] Yong-Ha Park , Jeonghoon Kook , Hoi-Jun Yoo Embedded DRAM (eDRAM) Power-Energy Estimation for System-on-a-Chip (SoC) Applications. [Citation Graph (0, 0)][DBLP ] VLSI Design, 2002, pp:625-630 [Conf ] Se-Joong Lee , Kangmin Lee , Hoi-Jun Yoo Analysis and Implementation of Practical, Cost-Effective Networks on Chips. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2005, v:22, n:5, pp:422-433 [Journal ] Kangmin Lee , Se-Joong Lee , Hoi-Jun Yoo Low-power network-on-chip for high-performance SoC design. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 2006, v:14, n:2, pp:148-160 [Journal ] Byeong-Gyu Nam , Jeabin Lee , Kwanho Kim , Seung-Jin Lee , Hoi-Jun Yoo A low-power handheld GPU using logarithmic arithmetic and triple DVFS power domains. [Citation Graph (0, 0)][DBLP ] Graphics Hardware, 2007, pp:73-80 [Conf ] Ju-Ho Sohn , Ramchan Woo , Hoi-Jun Yoo A programmable vertex shader with fixed-point SIMD datapath for low power wireless applications. [Citation Graph (0, 0)][DBLP ] Graphics Hardware, 2004, pp:107-114 [Conf ] Seung-Jin Lee , Sunyoung Kim , Hoi-Jun Yoo A Low Power Digital Signal Processor with Adaptive Band Activation for Digital Hearing Aid Chip. [Citation Graph (0, 0)][DBLP ] ISCAS, 2007, pp:2730-2733 [Conf ] Jeabin Lee , Byeong-Gyu Nam , Seong-Jun Song , Namjun Cho , Hoi-Jun Yoo A Power Management Unit with Continuous Co-Locking of Clock Frequency and Supply Voltage for Dynamic Voltage and Frequency Scaling. [Citation Graph (0, 0)][DBLP ] ISCAS, 2007, pp:2112-2115 [Conf ] Jooyoung Kim , Kangmin Lee , Hoi-Jun Yoo A 372 ps 64-bit adder using fast pull-up logic in 0.18µm CMOS. [Citation Graph (0, 0)][DBLP ] ISCAS, 2006, pp:- [Conf ] Jerald Yoo , Sunyoung Kim , Namjun Cho , Seong-Jun Song , Hoi-Jun Yoo A 10µW digital signal processor with adaptive-SNR monitoring for a sub-1V digital hearing aid. [Citation Graph (0, 0)][DBLP ] ISCAS, 2006, pp:- [Conf ] Sungdae Choi , Seong-Jun Song , Kyomin Sohn , Hyejung Kim , Jooyoung Kim , Jerald Yoo , Hoi-Jun Yoo A Low-power Star-topology Body Area Network Controller for Periodic Data Monitoring Around and Inside the Human Body. [Citation Graph (0, 0)][DBLP ] ISWC, 2006, pp:139-140 [Conf ] Seong-Jun Song , Seung-Jin Lee , Namjun Cho , Hoi-Jun Yoo Low Power Wearable Audio Player Using Human Body Communications. [Citation Graph (0, 0)][DBLP ] ISWC, 2006, pp:125-126 [Conf ] Donghyun Kim , Kwanho Kim , Joo-Young Kim , Seung-Jin Lee , Hoi-Jun Yoo Solutions for Real Chip Implementation Issues of NoC and Their Application to Memory-Centric NoC. [Citation Graph (0, 0)][DBLP ] NOCS, 2007, pp:30-39 [Conf ] Vision platform for mobile intelligent robot based on 81.6 GOPS object recognition processor. [Citation Graph (, )][DBLP ] A 200Mbps 0.02nJ/b dual-mode inductive coupling transceiver for cm-range interconnection. [Citation Graph (, )][DBLP ] A 6.3nJ/op low energy 160-bit modulo-multiplier for elliptic curve cryptography processor. [Citation Graph (, )][DBLP ] A 0.6pJ/b 3Gb/s/ch transceiver in 0.18 µm CMOS for 10mm on-chip interconnects. [Citation Graph (, )][DBLP ] A low power multimedia SoC with fully programmable 3D graphics and MPEG4/H.264/JPEG for mobile devices. [Citation Graph (, )][DBLP ] A 60fps 496mW multi-object recognition processor with workload-aware dynamic power management. [Citation Graph (, )][DBLP ] A Wearable Fabric Computer by Planar-Fashionable Circuit Board Technique. [Citation Graph (, )][DBLP ] A Low-Power Multimedia SoC with Fully Programmable 3D Graphics for Mobile Devices. [Citation Graph (, )][DBLP ] Search in 0.002secs, Finished in 0.331secs