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Sadiq M. Sait :
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Sadiq M. Sait , Habib Youssef , Shahid K. Tanvir , Muhammad S. T. Benten Timing influenced generell-cell genetic floorplanner. [Citation Graph (0, 0)][DBLP ] ASP-DAC, 1995, pp:- [Conf ] Aiman H. El-Maleh , S. Saqib Khursheed , Sadiq M. Sait Efficient Static Compaction Techniques for Sequential Circuits Based on Reverse Order Restoration and Test Relaxation. [Citation Graph (0, 0)][DBLP ] Asian Test Symposium, 2005, pp:378-385 [Conf ] Sadiq M. Sait , Mohammed H. Sqalli , Mohammed Aijaz Mohiuddin Engineering Evolutionary Algorithm to Solve Multi-objective OSPF Weight Setting Problem. [Citation Graph (0, 0)][DBLP ] Australian Conference on Artificial Intelligence, 2006, pp:950-955 [Conf ] Habib Youssef , Sadiq M. Sait , Salman A. Khan Fuzzy Evolutionary Hybrid Metaheuristic for Network Topology Design. [Citation Graph (0, 0)][DBLP ] EMO, 2001, pp:400-415 [Conf ] Sadiq M. Sait , Mohammed Faheemuddin , Mahmood R. Minhas , Syed Sanaullah Multiobjective VLSI cell placement using distributed genetic algorithm. [Citation Graph (0, 0)][DBLP ] GECCO, 2005, pp:1585-1586 [Conf ] Sadiq M. Sait , Syed Sanaullah , Ali Mustafa Zaidi , Mustafa I. Ali Comparative evaluation of parallelization strategies for evolutionary and stochastic heuristics. [Citation Graph (0, 0)][DBLP ] GECCO, 2005, pp:921-922 [Conf ] Sadiq M. Sait , Habib Youssef , Munir M. Zahra Tabu Search Based Circuit Optimization. [Citation Graph (0, 0)][DBLP ] Great Lakes Symposium on VLSI, 1998, pp:338-343 [Conf ] Habib Youssef , Sadiq M. Sait , Khaled Nassar , Muhammad S. T. Benten Performance driven standard-cell placement using the genetic algorithm. [Citation Graph (0, 0)][DBLP ] Great Lakes Symposium on VLSI, 1995, pp:124-127 [Conf ] Muhammad Atif Tahir , Habib Youssef , Abdulaziz Al-Mulhem , Sadiq M. Sait Fuzzy Based MultiObjective Multicast Routing Using Tabu Search. [Citation Graph (0, 0)][DBLP ] International Conference on Internet Computing, 2002, pp:164-170 [Conf ] Hasan Cam , Mostafa H. Abd-El-Barr , Sadiq M. Sait A High-Performance Hardware-Efficient Memory Allocation Technique and Design. [Citation Graph (0, 0)][DBLP ] ICCD, 1999, pp:274-276 [Conf ] Sadiq M. Sait , Habib Youssef , Junaid A. Khan , Aiman H. El-Maleh Fuzzified Iterative Algorithms for Performance Driven Low Power VLSI Placement. [Citation Graph (0, 0)][DBLP ] ICCD, 2001, pp:484-487 [Conf ] Mahmood R. Minhas , Sadiq M. Sait A Parallel Tabu Search Algorithm for Optimizing Multiobjective VLSI Placement. [Citation Graph (0, 0)][DBLP ] ICCSA (4), 2005, pp:587-595 [Conf ] Ahmad A. Al-Yamani , Sadiq M. Sait , Hassan Barada , Habib Youssef Parallel Tabu Search in a Heterogeneous Environment. [Citation Graph (0, 0)][DBLP ] IPDPS, 2003, pp:56- [Conf ] Hassan Barada , Sadiq M. Sait , Naved Baig Task Matching and Scheduling in Heterogeneous Systems Using Simulated Evolution. [Citation Graph (0, 0)][DBLP ] IPDPS, 2001, pp:87- [Conf ] Sadiq M. Sait , Mustafa I. Ali , Ali Mustafa Zaidi Evaluating parallel simulated evolution strategies for VLSI cell placement. [Citation Graph (0, 0)][DBLP ] IPDPS, 2006, pp:- [Conf ] Aamir A. Farooqui , Vojin G. Oklobdzija , Sadiq M. Sait Area-time optimal adder with relative placement generator. [Citation Graph (0, 0)][DBLP ] ISCAS (5), 2003, pp:141-144 [Conf ] Junaid A. Khan , Sadiq M. Sait Fast force-directed/simulated evolution hybrid for multiobjective VLSI cell placement. [Citation Graph (0, 0)][DBLP ] ISCAS (5), 2004, pp:53-56 [Conf ] Sadiq M. Sait , Aiman H. El-Maleh , Rush H. Al-Abuji Simulated evolution algorithm for multiobjective VLSI netlist bi-partitioning. [Citation Graph (0, 0)][DBLP ] ISCAS (5), 2003, pp:457-460 [Conf ] Sadiq M. Sait , Aiman H. El-Maleh , Raslan H. Al-Abaji General iterative heuristics for VLSI multiobjective partitioning. [Citation Graph (0, 0)][DBLP ] ISCAS (5), 2003, pp:497-500 [Conf ] Sadiq M. Sait , Ali Mustafa Zaidi , Mustafa I. Ali Multiobjective VLSI cell placement using distributed simulated evolution algorithm. [Citation Graph (0, 0)][DBLP ] ISCAS (6), 2005, pp:6226-6229 [Conf ] U. F. Siddiqi , Sadiq M. Sait , Aamir A. Farooqui Parallel algorithm for hardware implementation of inverse halftoning. [Citation Graph (0, 0)][DBLP ] ISCAS (3), 2005, pp:2377-2380 [Conf ] Junaid A. Khan , Sadiq M. Sait , Salman A. Khan A fast constructive algorithm for fixed channel assignment problem. [Citation Graph (0, 0)][DBLP ] ISCAS (5), 2001, pp:65-68 [Conf ] Habib Youssef , Sadiq M. Sait , H. Ali Adaptive bias simulated evolution algorithm for placement. [Citation Graph (0, 0)][DBLP ] ISCAS (5), 2001, pp:355-358 [Conf ] T.-C. Lin , Sadiq M. Sait , Walling R. Cyre Performance and Interface Buffer Size Driven Behavioral Partitioning for Embedded Systems. [Citation Graph (0, 0)][DBLP ] International Workshop on Rapid System Prototyping, 1998, pp:116-0 [Conf ] Habib Youssef , Abdulaziz Al-Mulhem , Sadiq M. Sait , Muhammad Atif Tahir QoS-driven multicast tree generation using Tabu search. [Citation Graph (0, 0)][DBLP ] Computer Communications, 2002, v:25, n:11-12, pp:1140-1149 [Journal ] Ahmad A. Al-Yamani , Sadiq M. Sait , Habib Youssef , Hassan Barada Parallelizing Tabu Search on a Cluster of Heterogeneous Workstations. [Citation Graph (0, 0)][DBLP ] J. Heuristics, 2002, v:8, n:3, pp:277-304 [Journal ] Aiman H. El-Maleh , S. Saqib Khursheed , Sadiq M. Sait Efficient Static Compaction Techniques for Sequential Circuits Based on Reverse-Order Restoration and Test Relaxation. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:11, pp:2556-2564 [Journal ] Sadiq M. Sait , Mohammed Faheemuddin , Mustafa I. Ali , Syed Sanaullah Simulated Evolution based Hybrids for Genetic Algorithm and Tabu Search. [Citation Graph (0, 0)][DBLP ] Computers and Their Applications, 2007, pp:30-35 [Conf ] Sadiq M. Sait , Ali Mustafa Zaidi , Mustafa I. Ali Asynchronous MMC based parallel SA schemes for multiobjective standard cell placement. [Citation Graph (0, 0)][DBLP ] ISCAS, 2006, pp:- [Conf ] Aiman H. El-Maleh , Sadiq M. Sait , F. Nawaz Khan Finite state machine state assignment for area and power minimization. [Citation Graph (0, 0)][DBLP ] ISCAS, 2006, pp:- [Conf ] Marwan H. Abu-Amara , Sadiq M. Sait , Abdul Subhan A heuristics based approach for cellular mobile network planning. [Citation Graph (0, 0)][DBLP ] IWCMC, 2006, pp:79-84 [Conf ] Hussein M. Alnuweiri , Sadiq M. Sait Efficient network folding techniques for routing permutations in VLSI. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 1995, v:3, n:2, pp:254-263 [Journal ] Timing influenced force directed floorplanning. [Citation Graph (, )][DBLP ] GSA: scheduling and allocation using genetic algorithm. [Citation Graph (, )][DBLP ] Algorithm for parallel inverse halftoning using partitioning of Look-Up Table (LUT). [Citation Graph (, )][DBLP ] A modified ant colony algorithm for evolutionary design of digital circuits. [Citation Graph (, )][DBLP ] Digital circuit design through simulated evolution (SimE). [Citation Graph (, )][DBLP ] An Enhanced Estimator to Multi-objective OSPF Weight Setting Problem. [Citation Graph (, )][DBLP ] Search in 0.003secs, Finished in 0.455secs