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Publications of Author

1. Chanik Park, Sungchan Kim, Soonhoi Ha
   A dataflow specification for system level synthesis of 3D graphics applications. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2001, pp:78-84 [Conf]
   
2. Sungchan Kim, Chaeseok Im, Soonhoi Ha
   Schedule-aware performance estimation of communication architecture for efficient design space exploration. [Citation Graph (0, 0)][DBLP]
   CODES+ISSS, 2003, pp:195-200 [Conf]
   
3. Sungchan Kim, Chaeseok Im, Soonhoi Ha
   Efficient exploration of on-chip bus architectures and memory allocation. [Citation Graph (0, 0)][DBLP]
   CODES+ISSS, 2004, pp:248-253 [Conf]
   
4. Sang Hun Lee, Kunwoo Lee, Sungchan Kim
   History-Based Selective Boolean Operations for Feature-Based Multi-resolution Modeling. [Citation Graph (0, 0)][DBLP]
   ICCSA (1), 2006, pp:459-468 [Conf]
   
5. Soonhoi Ha, Sungchan Kim, Chan-Eun Rhee, Hyunguk Jung, Youngmin Yi, Dohyung Kim
   Virtual Synchronization for Fast Distributed Cosimulation of Dataflow Task Graphs. [Citation Graph (0, 0)][DBLP]
   ISSS, 2002, pp:174-179 [Conf]
   
6. Sungchan Kim, Kunwoo Lee, Taesik Hong, Mincheol Kim, Moonki Jung, Youngjae Song
   An integrated approach to realize multi-resolution of B-rep model. [Citation Graph (0, 0)][DBLP]
   Symposium on Solid and Physical Modeling, 2005, pp:153-162 [Conf]
   
7. Taesik Hong, Kunwoo Lee, Sungchan Kim
   Similarity comparison of mechanical parts to reuse existing designs. [Citation Graph (0, 0)][DBLP]
   Computer-Aided Design, 2006, v:38, n:9, pp:973-984 [Journal]
   
8. Sungchan Kim, Kunwoo Lee, Taesik Hong, Moonki Jung
   Modeling in Multi-Resolution and Its Applications. [Citation Graph (0, 0)][DBLP]
   J. Comput. Sci. Technol., 2006, v:21, n:2, pp:272-278 [Journal]
   
9. Sungchan Kim, Chaeseok Im, Soonhoi Ha
   Schedule-aware performance estimation of communication architecture for efficient design space exploration. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2005, v:13, n:5, pp:539-552 [Journal]
   
10. Sungchan Kim, Soonhoi Ha
    Efficient exploration of bus-based system-on-chip architectures. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2006, v:14, n:7, pp:681-692 [Journal]
    
11. Hoeseok Yang, Sungchan Kim, Hae-woo Park, Jinwoo Kim, Soonhoi Ha
    Performance evaluation and optimization of dual-port SDRAM architecture for mobile embedded systems. [Citation Graph (0, 0)][DBLP]
    CASES, 2007, pp:53-57 [Conf]
    
12. Soonhoi Ha, Sungchan Kim, Choonseung Lee, Youngmin Yi, Seongnam Kwon, Young-Pyo Joo
    PeaCE: A hardware-software codesign environment for multimedia embedded systems. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:3, pp:- [Journal]
    
13. 
    Architecture Exploration of NAND Flash-based Multimedia Card. [Citation Graph (, )][DBLP]
    
    
14. 
    On-chip communication architecture exploration for processor-pool-based MPSoC. [Citation Graph (, )][DBLP]