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Publications of Author

1. Hirofumi Sakamoto, Ken'ichiro Uda, Bu-Y. Lee, Hiroyuki Ochi, Kazuo Taki, Takao Tsuda
   A 16-bit redundant binary multiplier using low-power pass-transistor logic SPL. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2000, pp:33-34 [Conf]
   
2. Hiromi Hiraishi, Kiyoharu Hamaguchi, Hiroyuki Ochi, Shuzo Yajima
   Vectorized Symbolic Model Checking of Computation Tree Logic for Sequential Machine Verification. [Citation Graph (0, 0)][DBLP]
   CAV, 1991, pp:214-224 [Conf]
   
3. Hiroyuki Ochi, Nagisa Ishiura, Shuzo Yajima
   Breadth-First Manipulation of SBDD of Boolean Functions for Vector Processing. [Citation Graph (0, 0)][DBLP]
   DAC, 1991, pp:413-416 [Conf]
   
4. Kentaro Nakahara, Shin'ichi Kouyama, Tomonori Izumi, Hiroyuki Ochi, Yukihiro Nakamura
   Autonomous-repair cell for fault tolerant dynamic-reconfigurable devices. [Citation Graph (0, 0)][DBLP]
   FPGA, 2006, pp:224- [Conf]
   
5. Hiroyuki Ochi, Koichi Yasuoka, Shuzo Yajima
   Breadth-first manipulation of very large binary-decision diagrams. [Citation Graph (0, 0)][DBLP]
   ICCAD, 1993, pp:48-55 [Conf]
   
6. Hiroyuki Ochi, Shigeaki Tagashira, Satoshi Fujita
   A Localization Scheme for Sensor Networks based onWireless Communication with Anchor Groups. [Citation Graph (0, 0)][DBLP]
   ICPADS (1), 2005, pp:299-305 [Conf]
   
7. Ryusuke Miyamoto, Hiroki Sugano, Hiroaki Saito, Hiroshi Tsutsui, Hiroyuki Ochi, Ken'ichi Hatanaka, Yukihiro Nakamura
   Pedestrian Recognition in Far-Infrared Images by Combining Boosting-Based Detection and Skeleton-Based Stochastic Tracking. [Citation Graph (0, 0)][DBLP]
   PSIVT, 2006, pp:483-494 [Conf]
   
8. Kentaro Nakahara, Shin'ichi Kouyama, Tomonori Izumi, Hiroyuki Ochi, Yukihiro Nakamura
   Fault Tolerant Reconfigurable Device Based on Autonomous-Repair Cells. [Citation Graph (0, 0)][DBLP]
   FPL, 2006, pp:1-6 [Conf]
   
9. Hiroki Sugano, Hiroshi Tsutsui, Takahiko Masuzaki, Takao Onoye, Hiroyuki Ochi, Yukihiro Nakamura
   Efficient memory architecture for JPEG2000 entropy codec. [Citation Graph (0, 0)][DBLP]
   ISCAS, 2006, pp:- [Conf]
   
10. 
    A high-throughput pipelined architecture for JPEG XR encoding. [Citation Graph (, )][DBLP]
    
    
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    Coarse-grained dynamically reconfigurable architecture with flexible reliability. [Citation Graph (, )][DBLP]
    
    
12. 
    Hot-Swapping architecture extension for mitigation of permanent functional unit faults. [Citation Graph (, )][DBLP]
    
    
13. 
    Dynamic rate control for media streaming in high-speed mobile networks. [Citation Graph (, )][DBLP]