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Publications of Author

1. Debasis Samanta, Ajit Pal
   Optimal Dual -VT Assignment for Low-Voltage Energy-Constrained CMOS Circuits. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2002, pp:193-198 [Conf]
   
2. Debasis Samanta, Ajit Pal, Nishant Sinha
   Synthesis of High Performance Low Power Dynamic CMOS Circuits. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2002, pp:99-104 [Conf]
   
3. Debasis Samanta, Ajit Pal
   Optimal Dual -VT Assignment for Low-Voltage Energy-Constrained CMOS Circuits. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 2002, pp:193-198 [Conf]
   
4. Debasis Samanta, Ajit Pal
   Synthesis of Dual-VT Dynamic CMOS Circuits. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 2003, pp:303-308 [Conf]
   
5. Debasis Samanta, Ajit Pal
   Synthesis of Low Power High Performance Dual-VT PTL Circuits. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 2004, pp:85-0 [Conf]
   
6. Debasis Samanta, Nishant Sinha, Ajit Pal
   Synthesis of High Performance Low Power Dynamic CMOS Circuits. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 2002, pp:99-104 [Conf]
   
7. Nikhil Tripathi, Amit M. Bhosle, Debasis Samanta, Ajit Pal
   Optimal Assignment of High Threshold Voltage for Synthesizing Dual Threshold CMOS Circuits. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 2001, pp:227-0 [Conf]
   
8. Dhiren M. Parmar, M. Sarma, Debasis Samanta
   A Novel Approach to Domino Circuit Synthesis. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 2007, pp:401-406 [Conf]
   
9. 
   A Novel Approach of Prioritizing Use Case Scenarios. [Citation Graph (, )][DBLP]
   
   
10. 
    Study and modeling of user errors for virtual scanning keyboard design. [Citation Graph (, )][DBLP]
    
    
11. 
    An Approach for Assessment of Reliability of the System Using Use Case Model. [Citation Graph (, )][DBLP]
    
    
12. 
    Designing Computer Interface for Physically Challenged Persons. [Citation Graph (, )][DBLP]
    
    
13. 
    A Dependence Graph-Based Test Coverage Analysis Technique for Object-Oriented Programs. [Citation Graph (, )][DBLP]
    
    
14. 
    Accurate Iris Boundary Detection in Iris-Based Biometric Authentication Process. [Citation Graph (, )][DBLP]
    
    
15. 
    A novel approach to system testing and reliability assessment using use case model. [Citation Graph (, )][DBLP]