The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Ajit Pal: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Debasis Samanta, Ajit Pal
    Optimal Dual -VT Assignment for Low-Voltage Energy-Constrained CMOS Circuits. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2002, pp:193-198 [Conf]
  2. Debasis Samanta, Ajit Pal, Nishant Sinha
    Synthesis of High Performance Low Power Dynamic CMOS Circuits. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2002, pp:99-104 [Conf]
  3. Gopal Paul, Ajit Pal, Bhargab B. Bhattacharya
    On finding the minimum test set of a BDD-based circuit. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2006, pp:169-172 [Conf]
  4. Ajit Pal, Umesh Patel
    Routing and Wavelength Assignment in Wavelength Division Multiplexing Networks. [Citation Graph (0, 0)][DBLP]
    IWDC, 2004, pp:391-396 [Conf]
  5. Maitrali Marik, Ajit Pal
    Energy-aware Logic Synthesis and Technology Mapping for MUX-based FPGAs. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2004, pp:73-78 [Conf]
  6. Rajat K. Pal, A. K. Datta, Sudebkumar Prasant Pal, M. M. Das, Ajit Pal
    A general graph theoretic framework for multi-layer channel routing. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1995, pp:202-207 [Conf]
  7. Rajat K. Pal, Sudebkumar Prasant Pal, M. M. Das, Ajit Pal
    Computing area and wire length efficient routes for channels. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1995, pp:196-201 [Conf]
  8. Rajat K. Pal, Sudebkumar Prasant Pal, Ajit Pal
    An Algorithm for Finding a Non-Trivial Lower Bound for Channel Routing. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1997, pp:531-533 [Conf]
  9. Rajat K. Pal, Sudebkumar Prasant Pal, Ajit Pal, Alak K. Dutta
    NP-Completeness of Multi-Layer No-Dogleg Channel Routing and an Efficient Heuristic. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1993, pp:80-83 [Conf]
  10. Debasis Samanta, Ajit Pal
    Optimal Dual -VT Assignment for Low-Voltage Energy-Constrained CMOS Circuits. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2002, pp:193-198 [Conf]
  11. Debasis Samanta, Ajit Pal
    Synthesis of Dual-VT Dynamic CMOS Circuits. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2003, pp:303-308 [Conf]
  12. Debasis Samanta, Ajit Pal
    Synthesis of Low Power High Performance Dual-VT PTL Circuits. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2004, pp:85-0 [Conf]
  13. Debasis Samanta, Nishant Sinha, Ajit Pal
    Synthesis of High Performance Low Power Dynamic CMOS Circuits. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2002, pp:99-104 [Conf]
  14. Nikhil Tripathi, Amit M. Bhosle, Debasis Samanta, Ajit Pal
    Optimal Assignment of High Threshold Voltage for Synthesizing Dual Threshold CMOS Circuits. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2001, pp:227-0 [Conf]
  15. Akepati Sravan, Sujan Kundu, Ajit Pal
    Low Power Sensor Node for a Wireless Sensor Network. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2007, pp:445-450 [Conf]
  16. Rajat K. Pal, Sudebkumar Prasant Pal, Ajit Pal
    An algorithm for finding a non-trivial lower bound for channel routing1. [Citation Graph (0, 0)][DBLP]
    Integration, 1998, v:25, n:1, pp:71-84 [Journal]
  17. Ajit Pal
    An Algorithm for Optimal Logic Design Using Multiplexers. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1986, v:35, n:8, pp:755-757 [Journal]

  18. Leveraging UPF-extracted assertions for modeling and formal verification of architectural power intent. [Citation Graph (, )][DBLP]


  19. Why to Use Dual-Vt, If Single-Vt Serves the Purpose Better under Process Parameter Variations? [Citation Graph (, )][DBLP]


  20. Synthesis & Testing for Low Power. [Citation Graph (, )][DBLP]


  21. Routing and Wavelength Assignment in All Optical Networks Based on Clique Partitioning. [Citation Graph (, )][DBLP]


  22. Credit Reputation Propagation: A Strategy to Curb Free-Riding in a Large BitTorrent Swarm. [Citation Graph (, )][DBLP]


  23. Low Power BDD-based Synthesis Using Dual Rail Static DCVSPG Logic. [Citation Graph (, )][DBLP]


  24. A genetic algorithm based approach for traffic grooming, routing and wavelength assignment in optical WDM mesh networks. [Citation Graph (, )][DBLP]


  25. A power-aware wireless sensor network based bridge monitoring system. [Citation Graph (, )][DBLP]


Search in 0.099secs, Finished in 0.100secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002