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D. Sarkar Register Transfer Operation Analysis during Data Path Verification. [Citation Graph (0, 0)][DBLP] VLSI Design, 2002, pp:172-0 [Conf]
M. Hira, D. Sarkar Verification of Tempura specification of sequential circuits. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1997, v:16, n:4, pp:362-375 [Journal]
D. Sarkar, S. C. De Sarkar Some Inference Rules for Integer Arithmetic for Verification of Flowchart Programs on Integers. [Citation Graph (0, 0)][DBLP] IEEE Trans. Software Eng., 1989, v:15, n:1, pp:1-9 [Journal]
D. Sarkar, S. C. De Sarkar A Set of Inference Rules for Quantified Formula Handling and Array Handling in Verification of Programs Over Integers. [Citation Graph (0, 0)][DBLP] IEEE Trans. Software Eng., 1989, v:15, n:11, pp:1368-1381 [Journal]