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Chih-Pin Su: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Chih-Pin Su, Chia-Lung Horng, Chih-Tsun Huang, Cheng-Wen Wu
    A configurable AES processor for enhanced security. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:361-366 [Conf]
  2. Chih-Pin Su, Chen-Hsing Wang, Kuo-Liang Cheng, Chih-Tsun Huang, Cheng-Wen Wu
    Design and test of a scalable security processor. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:372-375 [Conf]
  3. Mao-Yin Wang, Chih-Pin Su, Chih-Tsun Huang, Cheng-Wen Wu
    An HMAC processor with integrated SHA-1 and MD5 algorithms. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2004, pp:456-458 [Conf]
  4. Jin-Fu Li, Hsin-Jung Huang, Jeng-Bin Chen, Chih-Ping Su, Cheng-Wen Wu, Chuang Cheng, Shao-I Chen, Chi-Yi Hwang, Hsiao-Ping Lin
    A Hierarchical Test Scheme for System-On-Chip Designs. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:486-490 [Conf]
  5. Jin-Fu Li, Hsin-Jung Huang, Jeng-Bin Chen, Chih-Pin Su, Cheng-Wen Wu, Chuang Cheng, Shao-I Chen, Chi-Yi Hwang, Hsiao-Ping Lin
    A Hierarchical Test Methodology for Systems on Chip. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2002, v:22, n:5, pp:69-81 [Journal]

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