Search the dblp DataBase

Publications of Author

1. Oliver Schliebusch, Andreas Hoffmann, Achim Nohl, Gunnar Braun, Heinrich Meyr
   Architecture Implementation Using the Machine Description Language LISA. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2002, pp:239-244 [Conf]
   
2. Gunnar Braun, Achim Nohl, Weihua Sheng, Jianjiang Ceng, Manuel Hohenauer, Hanno Scharwächter, Rainer Leupers, Heinrich Meyr
   A novel approach for flexible and consistent ADL-driven ASIP design. [Citation Graph (0, 0)][DBLP]
   DAC, 2004, pp:717-722 [Conf]
   
3. Achim Nohl, Gunnar Braun, Oliver Schliebusch, Rainer Leupers, Heinrich Meyr, Andreas Hoffmann
   A universal technique for fast and flexible instruction-set architecture simulation. [Citation Graph (0, 0)][DBLP]
   DAC, 2002, pp:22-27 [Conf]
   
4. Achim Nohl, Volker Greive, Gunnar Braun, Andreas Hoffmann, Rainer Leupers, Oliver Schliebusch, Heinrich Meyr
   Instruction encoding synthesis for architecture exploration using hierarchical processor models. [Citation Graph (0, 0)][DBLP]
   DAC, 2003, pp:262-267 [Conf]
   
5. Gunnar Braun, Andreas Wieferink, Oliver Schliebusch, Rainer Leupers, Heinrich Meyr, Achim Nohl
   Processor/Memory Co-Exploration on Multiple Abstraction Levels. [Citation Graph (0, 0)][DBLP]
   DATE, 2003, pp:10966-10973 [Conf]
   
6. Jianjiang Ceng, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun
   C Compiler Retargeting Based on Instruction Semantics Models. [Citation Graph (0, 0)][DBLP]
   DATE, 2005, pp:1150-1155 [Conf]
   
7. Andreas Hoffmann, Achim Nohl, Stefan Pees, Gunnar Braun, Heinrich Meyr
   Generating production quality software development tools using a machine description language. [Citation Graph (0, 0)][DBLP]
   DATE, 2001, pp:674-678 [Conf]
   
8. Manuel Hohenauer, Hanno Scharwächter, Kingshuk Karuri, Oliver Wahlen, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun, Hans van Someren
   A Methodology and Tool Suite for C Compiler Generation from ADL Processor Models. [Citation Graph (0, 0)][DBLP]
   DATE, 2004, pp:1276-1283 [Conf]
   
9. Oliver Schliebusch, Anupam Chattopadhyay, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Mario Steinert, Gunnar Braun, Achim Nohl
   RTL Processor Synthesis for Architecture Exploration and Implementation. [Citation Graph (0, 0)][DBLP]
   DATE, 2004, pp:156-160 [Conf]
   
10. Andreas Wieferink, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun, Achim Nohl
    A System Level Processor/Communication Co-Exploration Methodology for Multi-Processor System-on-Chip Platform. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:1256-1263 [Conf]
    
11. Andreas Hoffmann, Oliver Schliebusch, Achim Nohl, Gunnar Braun, Oliver Wahlen, Heinrich Meyr
    A Methodology for the Design of Application Specific Instruction Set Processors (ASIP) using the Machine Description Language LISA. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2001, pp:625-630 [Conf]
    
12. Gunnar Braun, Andreas Hoffmann, Achim Nohl, Heinrich Meyr
    Using static scheduling techniques for the retargeting of high speed, compiled simulators for embedded processors from an abstract machine description. [Citation Graph (0, 0)][DBLP]
    ISSS, 2001, pp:57-62 [Conf]
    
13. Jianjiang Ceng, Weihua Sheng, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun
    Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2004, pp:463-473 [Conf]
    
14. Oliver Wahlen, Manuel Hohenauer, Gunnar Braun, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Xiaoning Nie
    Extraction of Efficient Instruction Schedulers from Cycle-True Processor Models. [Citation Graph (0, 0)][DBLP]
    SCOPES, 2003, pp:167-181 [Conf]
    
15. Oliver Schliebusch, Andreas Hoffmann, Achim Nohl, Gunnar Braun, Heinrich Meyr
    Architecture Implementation Using the Machine Description Language LISA. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2002, pp:239-244 [Conf]
    
16. Gunnar Braun, Achim Nohl, Andreas Hoffmann, Oliver Schliebusch, Rainer Leupers, Heinrich Meyr
    A universal technique for fast and flexible instruction-set architecture simulation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:12, pp:1625-1639 [Journal]
    
17. Andreas Hoffmann, Tim Kogel, Achim Nohl, Gunnar Braun, Oliver Schliebusch, Oliver Wahlen, Andreas Wieferink, Heinrich Meyr
    A novel methodology for the design of application-specificinstruction-set processors (ASIPs) using a machine description language. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2001, v:20, n:11, pp:1338-1354 [Journal]
    
18. Jianjiang Ceng, Weihua Sheng, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun
    Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2006, v:43, n:2-3, pp:235-246 [Journal]