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## Search the dblp DataBase
Christoph Scholl:
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## Publications of Author- Christoph Scholl, Bernd Becker, Andreas Brogle
**The multiple variable order problem for binary decision diagrams: theory and practical application.**[Citation Graph (0, 0)][DBLP] ASP-DAC, 2001, pp:85-90 [Conf] - Christoph Scholl, Paul Molitor
**Communication based FPGA synthesis for multi-output Boolean functions.**[Citation Graph (0, 0)][DBLP] ASP-DAC, 1995, pp:- [Conf] - Werner Damm, Stefan Disch, Hardi Hungar, Jun Pang, Florian Pigorsch, Christoph Scholl, Uwe Waldmann, Boris Wirtz
**Automatic Verification of Hybrid Systems with Large Discrete State Space.**[Citation Graph (0, 0)][DBLP] ATVA, 2006, pp:276-291 [Conf] - Andreas Hett, Christoph Scholl, Bernd Becker
**Distance driven finite state machine traversal.**[Citation Graph (0, 0)][DBLP] DAC, 2000, pp:39-42 [Conf] - Christoph Scholl, Bernd Becker
**Checking Equivalence for Partial Implementations.**[Citation Graph (0, 0)][DBLP] DAC, 2001, pp:238-243 [Conf] - Christoph Scholl
**Multi-output Functional Decomposition with Exploitation of Don't Cares.**[Citation Graph (0, 0)][DBLP] DATE, 1998, pp:743-748 [Conf] - Christoph Scholl, Bernd Becker
**On the Generation of Multiplexer Circuits for Pass Transistor Logic.**[Citation Graph (0, 0)][DBLP] DATE, 2000, pp:372-0 [Conf] - Tobias Nopper, Christoph Scholl
**Approximate Symbolic Model Checking for Incomplete Designs.**[Citation Graph (0, 0)][DBLP] FMCAD, 2004, pp:290-305 [Conf] - Florian Pigorsch, Christoph Scholl, Stefan Disch
**Advanced Unbounded Model Checking Based on AIGs, BDD Sweeping, And Quantifier Scheduling.**[Citation Graph (0, 0)][DBLP] FMCAD, 2006, pp:89-96 [Conf] - Christoph Scholl, Bernd Becker, Thomas M. Weis
**Word-level decision diagrams, WLCDs and division.**[Citation Graph (0, 0)][DBLP] ICCAD, 1998, pp:672-677 [Conf] - Christoph Scholl, Rolf Drechsler, Bernd Becker
**Functional simulation using binary decision diagrams.**[Citation Graph (0, 0)][DBLP] ICCAD, 1997, pp:8-12 [Conf] - Christoph Scholl, Bernd Becker
**Checking Equivalence for Circuits Containing Incompletely Specified Boxes.**[Citation Graph (0, 0)][DBLP] ICCD, 2002, pp:56-63 [Conf] - Christoph Scholl, Marc Herbstritt, Bernd Becker
**Exploiting don't cares to minimize *BMDs.**[Citation Graph (0, 0)][DBLP] ISCAS (5), 2001, pp:191-194 [Conf] - Marc Herbstritt, Bernd Becker, Christoph Scholl
**Advanced SAT-Techniques for Bounded Model Checking of Blackbox Designs.**[Citation Graph (0, 0)][DBLP] MTV, 2006, pp:37-44 [Conf] - Christoph Scholl, Bernd Becker, Thomas M. Weis
**On WLCDs and the Complexity of Word-Level Decision Diagrams-A Lower Bound for Division.**[Citation Graph (0, 0)][DBLP] Formal Methods in System Design, 2002, v:20, n:3, pp:311-326 [Journal] - Christoph Scholl, Dirk Möller, Paul Molitor, Rolf Drechsler
**BDD minimization using symmetries.**[Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:2, pp:81-100 [Journal] - Werner Damm, Stefan Disch, Hardi Hungar, Swen Jacobs, Jun Pang, Florian Pigorsch, Christoph Scholl, Uwe Waldmann, Boris Wirtz
**Exact State Set Representations in the Verification of Linear Hybrid Systems with Large Discrete State Space.**[Citation Graph (0, 0)][DBLP] ATVA, 2007, pp:425-440 [Conf] **Combinational Equivalence Checking Using Incremental SAT Solving, Output Ordering, and Resets.**[Citation Graph (, )][DBLP]**A probabilistic and energy-efficient scheduling approach for online application in real-time systems.**[Citation Graph (, )][DBLP]**An AIG-Based QBF-solver using SAT for preprocessing.**[Citation Graph (, )][DBLP]**Minimizing ROBDD sizes of incompletely specified Boolean functionsby exploiting strong symmetries.**[Citation Graph (, )][DBLP]**Exploiting structure in an AIG based QBF solver.**[Citation Graph (, )][DBLP]**Computation of minimal counterexamples by using black box techniques and symbolic methods.**[Citation Graph (, )][DBLP]**Computing Optimized Representations for Non-convex Polyhedra by Detection and Removal of Redundant Linear Constraints.**[Citation Graph (, )][DBLP]**Improving energy-efficient real-time scheduling by exploiting code instrumentation.**[Citation Graph (, )][DBLP]
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