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Hortensia Mecha: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jesús Tabero, Julio Septién, Hortensia Mecha, Daniel Mozos
    Task placement heuristic based on 3D-adjacency and look-ahead in reconfigurable systems. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2006, pp:396-401 [Conf]
  2. J. A. Maestro, Daniel Mozos, Hortensia Mecha
    A Macroscopic Time and Cost Estimation Model Allowing Task Parallelism and Hardware Sharing for the Codesign Partitioning Process. [Citation Graph (0, 0)][DBLP]
    DATE, 1998, pp:218-225 [Conf]
  3. Sara Román, Hortensia Mecha, Daniel Mozos, Julio Septién
    Partition Based Dynamic 2D HW Multitasking Management. [Citation Graph (0, 0)][DBLP]
    DSD, 2006, pp:61-70 [Conf]
  4. Jesús Tabero, Julio Septién, Hortensia Mecha, Daniel Mozos
    A Low Fragmentation Heuristic for Task Placement in 2D RTR HW Management. [Citation Graph (0, 0)][DBLP]
    FPL, 2004, pp:241-250 [Conf]
  5. Julio Septién, Hortensia Mecha, Daniel Mozos, Jesús Tabero
    2D defragmentation heuristics for hardware multitasking on reconfigurable devices. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  6. Javier Resano, Daniel Mozos, Elena Pérez-Miñana, Hortensia Mecha, Julio Septién
    A Hardware/Software Partitioning and Scheduling Approach for Embedded Systems with Low-Power and High Performance Requirements. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2003, pp:580-589 [Conf]
  7. Hortensia Mecha, Milagros Fernández
    Interconnection Delay and Clock Cycle Selection in High Level Synthesis. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1997, pp:504-505 [Conf]
  8. R. Moreno, Román Hermida, Milagros Fernández, Hortensia Mecha
    A unified approach for scheduling and allocation. [Citation Graph (0, 0)][DBLP]
    Integration, 1997, v:23, n:1, pp:1-35 [Journal]
  9. Katzalin Olcoz, Francisco Tirado, Hortensia Mecha
    Unified data path allocation and BIST intrusion. [Citation Graph (0, 0)][DBLP]
    Integration, 1999, v:28, n:1, pp:55-99 [Journal]
  10. Hortensia Mecha, Milagros Fernández, Francisco Tirado, Julio Septién, D. Motes, Katzalin Olcoz
    A method for area estimation of data-path in high level synthesis. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1996, v:15, n:2, pp:258-265 [Journal]
  11. Sara Román, Julio Septién, Hortensia Mecha, Daniel Mozos
    Constant Complexity Management of 2D HW Multitasking in Run-Time Reconfigurable FPGAs. [Citation Graph (0, 0)][DBLP]
    ARC, 2006, pp:187-192 [Conf]
  12. Javier Resano, M. Elena Pérez, Daniel Mozos, Hortensia Mecha, Julio Septién
    Analyzing communication overheads during hardware/software partitioning. [Citation Graph (0, 0)][DBLP]
    Microelectronics Journal, 2003, v:34, n:11, pp:1001-1007 [Journal]

  13. Resource Management for Hw Multitasking in Three Dimensional FPGAs. [Citation Graph (, )][DBLP]


  14. FPGA Resource Management Using Internal RAM as Aata Cache. [Citation Graph (, )][DBLP]


  15. Synthesis of relocatable tasks and implementation of a task communication bus in a general purpose Hw system. [Citation Graph (, )][DBLP]


  16. Perimeter quadrature-based metric for estimating FPGA fragmentation in 2D HW multitasking. [Citation Graph (, )][DBLP]


  17. 3D FPGA resource management and fragmentation metric for hardware multitasking. [Citation Graph (, )][DBLP]


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